Re: [Qemu-devel] Help on TLB Flush

[Paolo Bonzini]

On 12/02/2015 22:57, Peter Maydell wrote:
> The only
> requirement is that if the CPU that did the TLB maintenance
> op executes a DMB (barrier) then the TLB op must finish
> before the barrier completes execution. So you could split
> the "kick off TLB invalidate" and "make sure all CPUs
> are done" phases if you wanted. [cf v8 ARM ARM rev A.e
> section D4.7.2 and in particular the subsection on
> "ordering and completion".]

You can just make DMB start a new translation block.  Then when the TLB
flush helpers call cpu_exit() or cpu_interrupt() the flush request is
serviced.

Paolo