[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 00/11] target-arm: handle mmu_idx/translation reg
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 00/11] target-arm: handle mmu_idx/translation regimes properly |
Date: |
Thu, 29 Jan 2015 18:55:06 +0000 |
This patchseries fixes up our somewhat broken handling of mmu_idx values:
* implement the full set of 7 mmu_idxes we need for supporting EL2 and EL3
* pass the mmu_idx in the TB flags rather than EL or a priv flag,
so we can generate code with the correct kind of access
* identify the correct mmu_idx to use for AT/ATS system insns
* pass mmu_idx into get_phys_addr() and use it within that family
of functions as an indication of which translation regime to do
a v-to-p lookup for, instead of relying on an is_user flag plus the
current CPU state
* some minor indent stuff on the end
It does not contain:
* complete support for EL2 or 64-bit EL3; in some places I have added
the code where it was obvious and easy; in others I have just left
TODO marker comments
* the 'tlb_flush_for_mmuidx' functionality I proposed in a previous mail;
I preferred to get the semantics right in this patchset first before
improving the efficiency later
Changes v1->v2:
* use the correct FCSEIDR for the translation regime
* fix typo in patch 1 for MEMSUFFIX to use for new index 6
* a few new comments and other minor nits as per review of v1
Peter Maydell (11):
cpu_ldst.h: Allow NB_MMU_MODES to be 7
target-arm: Make arm_current_el() return sensible values for M profile
target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT
target-arm: Define correct mmu_idx values and pass them in TB flags
target-arm: Use correct mmu_idx for unprivileged loads and stores
target-arm: Don't define any MMU_MODE*_SUFFIXes
target-arm: Split AArch64 cases out of ats_write()
target-arm: Pass mmu_idx to get_phys_addr()
target-arm: Use mmu_idx in get_phys_addr()
target-arm: Reindent ancient page-table-walk code
target-arm: Fix brace style in reindented code
include/exec/cpu_ldst.h | 28 ++-
target-arm/cpu.h | 121 +++++++---
target-arm/helper.c | 548 +++++++++++++++++++++++++++++++--------------
target-arm/translate-a64.c | 24 +-
target-arm/translate.c | 31 ++-
target-arm/translate.h | 3 +-
6 files changed, 557 insertions(+), 198 deletions(-)
--
1.9.1
- [Qemu-devel] [PATCH v2 00/11] target-arm: handle mmu_idx/translation regimes properly,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 06/11] target-arm: Don't define any MMU_MODE*_SUFFIXes, Peter Maydell, 2015/01/29
- [Qemu-devel] [PATCH v2 02/11] target-arm: Make arm_current_el() return sensible values for M profile, Peter Maydell, 2015/01/29
- [Qemu-devel] [PATCH v2 11/11] target-arm: Fix brace style in reindented code, Peter Maydell, 2015/01/29
- [Qemu-devel] [PATCH v2 10/11] target-arm: Reindent ancient page-table-walk code, Peter Maydell, 2015/01/29
- [Qemu-devel] [PATCH v2 08/11] target-arm: Pass mmu_idx to get_phys_addr(), Peter Maydell, 2015/01/29
- [Qemu-devel] [PATCH v2 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7, Peter Maydell, 2015/01/29