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Re: [Qemu-devel] [RFC 01/10] target-arm: protect cpu_exclusive_*.
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [RFC 01/10] target-arm: protect cpu_exclusive_*. |
Date: |
Tue, 27 Jan 2015 14:36:32 +0000 |
address@hidden writes:
> From: KONRAD Frederic <address@hidden>
>
> This adds a lock to avoid multiple exclusive access at the same time in case
> of
> TCG multithread.
>
> Signed-off-by: KONRAD Frederic <address@hidden>
>
> V1 -> V2:
> Removed qemu_mutex_destroy().
> ---
> target-arm/cpu.c | 14 ++++++++++++++
> target-arm/cpu.h | 3 +++
> target-arm/helper.h | 3 +++
> target-arm/op_helper.c | 10 ++++++++++
> target-arm/translate.c | 6 ++++++
> 5 files changed, 36 insertions(+)
>
<snip>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index bdfcdf1..513d151 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7381,6 +7381,7 @@ static void gen_load_exclusive(DisasContext *s, int rt,
> int rt2,
> abort();
> }
>
> + gen_helper_exclusive_lock();
> if (size == 3) {
> TCGv_i32 tmp2 = tcg_temp_new_i32();
> TCGv_i32 tmp3 = tcg_temp_new_i32();
> @@ -7396,11 +7397,14 @@ static void gen_load_exclusive(DisasContext *s, int
> rt, int rt2,
>
> store_reg(s, rt, tmp);
> tcg_gen_extu_i32_i64(cpu_exclusive_addr, addr);
> + gen_helper_exclusive_unlock();
> }
>
> static void gen_clrex(DisasContext *s)
> {
> + gen_helper_exclusive_lock();
> tcg_gen_movi_i64(cpu_exclusive_addr, -1);
> + gen_helper_exclusive_unlock();
> }
>
> #ifdef CONFIG_USER_ONLY
> @@ -7431,6 +7435,7 @@ static void gen_store_exclusive(DisasContext *s, int
> rd, int rt, int rt2,
> done_label = gen_new_label();
> extaddr = tcg_temp_new_i64();
> tcg_gen_extu_i32_i64(extaddr, addr);
> + gen_helper_exclusive_lock();
> tcg_gen_brcond_i64(TCG_COND_NE, extaddr, cpu_exclusive_addr, fail_label);
> tcg_temp_free_i64(extaddr);
>
> @@ -7495,6 +7500,7 @@ static void gen_store_exclusive(DisasContext *s, int
> rd, int rt, int rt2,
> tcg_gen_movi_i32(cpu_R[rd], 1);
> gen_set_label(done_label);
> tcg_gen_movi_i64(cpu_exclusive_addr, -1);
> + gen_helper_exclusive_unlock();
> }
> #endif
As the aarch64 code shares a lot of helper code with arm it is probably
worth adding the locks to both translate and translate-a64.c.
--
Alex Bennée
- [Qemu-devel] [RFC 00/10] MultiThread TCG., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 03/10] replace spinlock by QemuMutex., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 07/10] tcg: remove tcg_halt_cond global variable., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 08/10] Drop global lock during TCG code execution, fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 01/10] target-arm: protect cpu_exclusive_*., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 09/10] cpu: remove exit_request global., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 05/10] extract TBContext from TCGContext., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 10/10] tcg: switch on multithread., fred . konrad, 2015/01/16
- [Qemu-devel] [RFC 02/10] use a different translation block list for each cpu., fred . konrad, 2015/01/16