[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [RFC PATCH v1 01/13] spapr: enable PHB/CPU/LMB hotplug
From: |
Michael Roth |
Subject: |
Re: [Qemu-devel] [RFC PATCH v1 01/13] spapr: enable PHB/CPU/LMB hotplug for pseries-2.3 |
Date: |
Thu, 22 Jan 2015 15:08:59 -0600 |
User-agent: |
alot/0.3.4 |
Quoting Bharata B Rao (2015-01-08 00:10:08)
> From: Michael Roth <address@hidden>
>
> Introduce an sPAPRMachineClass sub-class of MachineClass to
> handle sPAPR-specific machine configuration properties.
>
> The 'dr_phb[cpu,lmb]_enabled' field of that class can be set as
> part of machine-specific init code, and is then propagated
> to sPAPREnvironment to conditional enable creation of DRC
> objects and device-tree description to facilitate hotplug
> of PHBs/CPUs/LMBs.
>
> Since we can't migrate this state to older machine types,
> default the option to false and only enable it for new
> machine types.
>
> Signed-off-by: Michael Roth <address@hidden>
> Signed-off-by: Bharata B Rao <address@hidden>
> [Added CPU and LMB bits]
Reviewed-by: Michael Roth <address@hidden>
> ---
> hw/ppc/spapr.c | 32 ++++++++++++++++++++++++++++++++
> include/hw/ppc/spapr.h | 3 +++
> 2 files changed, 35 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 9eb0a94..71e7052 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -89,11 +89,29 @@
>
> #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
>
> +typedef struct sPAPRMachineClass sPAPRMachineClass;
> typedef struct sPAPRMachineState sPAPRMachineState;
>
> #define TYPE_SPAPR_MACHINE "spapr-machine"
> #define SPAPR_MACHINE(obj) \
> OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
> +#define SPAPR_MACHINE_GET_CLASS(obj) \
> + OBJECT_GET_CLASS(sPAPRMachineClass, obj, TYPE_SPAPR_MACHINE)
> +#define SPAPR_MACHINE_CLASS(klass) \
> + OBJECT_CLASS_CHECK(sPAPRMachineClass, klass, TYPE_SPAPR_MACHINE)
> +
> +/**
> + * sPAPRMachineClass:
> + */
> +struct sPAPRMachineClass {
> + /*< private >*/
> + MachineClass parent_class;
> +
> + /*< public >*/
> + bool dr_phb_enabled; /* enable dynamic-reconfig/hotplug of PHBs */
> + bool dr_cpu_enabled; /* enable dynamic-reconfig/hotplug of CPUs */
> + bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */
> +};
>
> /**
> * sPAPRMachineState:
> @@ -1343,6 +1361,7 @@ static SaveVMHandlers savevm_htab_handlers = {
> /* pSeries LPAR / sPAPR hardware init */
> static void ppc_spapr_init(MachineState *machine)
> {
> + sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> ram_addr_t ram_size = machine->ram_size;
> const char *cpu_model = machine->cpu_model;
> const char *kernel_filename = machine->kernel_filename;
> @@ -1503,6 +1522,10 @@ static void ppc_spapr_init(MachineState *machine)
> /* We always have at least the nvram device on VIO */
> spapr_create_nvram(spapr);
>
> + spapr->dr_phb_enabled = smc->dr_phb_enabled;
> + spapr->dr_cpu_enabled = smc->dr_cpu_enabled;
> + spapr->dr_lmb_enabled = smc->dr_lmb_enabled;
> +
> /* Set up PCI */
> spapr_pci_rtas_init();
>
> @@ -1722,6 +1745,7 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error
> **errp)
> static void spapr_machine_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> + sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
> FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
> NMIClass *nc = NMI_CLASS(oc);
>
> @@ -1733,6 +1757,9 @@ static void spapr_machine_class_init(ObjectClass *oc,
> void *data)
> mc->default_boot_order = NULL;
> mc->kvm_type = spapr_kvm_type;
> mc->has_dynamic_sysbus = true;
> + smc->dr_phb_enabled = false;
> + smc->dr_cpu_enabled = false;
> + smc->dr_lmb_enabled = false;
>
> fwc->get_dev_path = spapr_get_fw_dev_path;
> nc->nmi_monitor_handler = spapr_nmi;
> @@ -1744,6 +1771,7 @@ static const TypeInfo spapr_machine_info = {
> .abstract = true,
> .instance_size = sizeof(sPAPRMachineState),
> .instance_init = spapr_machine_initfn,
> + .class_size = sizeof(sPAPRMachineClass),
> .class_init = spapr_machine_class_init,
> .interfaces = (InterfaceInfo[]) {
> { TYPE_FW_PATH_PROVIDER },
> @@ -1788,11 +1816,15 @@ static const TypeInfo spapr_machine_2_2_info = {
> static void spapr_machine_2_3_class_init(ObjectClass *oc, void *data)
> {
> MachineClass *mc = MACHINE_CLASS(oc);
> + sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
>
> mc->name = "pseries-2.3";
> mc->desc = "pSeries Logical Partition (PAPR compliant) v2.3";
> mc->alias = "pseries";
> mc->is_default = 1;
> + smc->dr_phb_enabled = true;
> + smc->dr_cpu_enabled = true;
> + smc->dr_lmb_enabled = true;
> }
>
> static const TypeInfo spapr_machine_2_3_info = {
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 973193d..b1a0838 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -30,6 +30,9 @@ typedef struct sPAPREnvironment {
> uint64_t rtc_offset;
> struct PPCTimebase tb;
> bool has_graphics;
> + bool dr_phb_enabled; /* hotplug / dynamic-reconfiguration of PHBs */
> + bool dr_cpu_enabled; /* hotplug / dynamic-reconfiguration of CPUs */
> + bool dr_lmb_enabled; /* hotplug / dynamic-reconfiguration of LMBs */
>
> uint32_t check_exception_irq;
> Notifier epow_notifier;
> --
> 2.1.0
- [Qemu-devel] [RFC PATCH v1 00/13] CPU and Memory hotplug for PowerPC guests, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 11/13] spapr: Initialize hotplug memory address space, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 08/13] spapr: Enable CPU hotplug for POWER8 CPU family, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 03/13] spapr: Consider max_cpus during xics initialization, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 04/13] spapr: Factor out CPU initialization code into realizefn, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 01/13] spapr: enable PHB/CPU/LMB hotplug for pseries-2.3, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 13/13] spapr: Memory hotplug support, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 07/13] spapr: Start all the threads of CPU core when core is hotplugged, Bharata B Rao, 2015/01/08
- [Qemu-devel] [RFC PATCH v1 05/13] spapr: Support ibm, lrdr-capacity device tree property, Bharata B Rao, 2015/01/08