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From: | Richard Henderson |
Subject: | Re: [Qemu-devel] [PATCH 4/4] target-tricore: Add instructions of RRR opcode format |
Date: | Wed, 21 Jan 2015 11:45:15 -0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 |
On 01/21/2015 10:04 AM, Bastian Koppelmann wrote: > Add microcode generator function gen_cond_sub. > > Add helper functions: > * ixmax/ixmin: search for the max/min value and its related index in a > vector of 16-bit values. > * pack: dack two data registers into an IEEE-754 single precision floating > point format number. > * dvadj: divide-adjust the result after dvstep instructions. > * dvstep: divide a reg by a divisor, producing 8-bits of quotient at a > time. > > OPCM_32_RRR_FLOAT -> OPCM_32_RRR_DIVIDE > > Signed-off-by: Bastian Koppelmann <address@hidden> > --- Reviewed-by: Richard Henderson <address@hidden> r~
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