Re: [Qemu-devel] [RFC PATCH 2/4] pcie-aer: Fix command pcie_aer_inject_error is invalid

[Marcel Apfelbaum]

On 01/21/2015 11:56 AM, Chen Fan wrote:
> On 01/16/2015 03:56 PM, Chen Fan wrote:
> > On 01/12/2015 09:56 PM, Marcel Apfelbaum wrote:
> > > On 01/12/2015 05:04 AM, Chen Fan wrote:
> > > > in spec "PCI Express 3.0" section 6.2.6 Figure 6-3 virtual bridge part,
> > > > the flowchart showing tell us SERR# enable at Bridge Control register
> > > > associate with system error at Secondary Status register can send error
> > > > message. but bridge_control from dev->config is NULL, and SERR# was set
> > > > in dev->wmask in pcie_aer_init()
> > > wmask denotes the register bits that can be written by the guest.
> > >
> > > If you are referring to:
> > >        pci_word_test_and_set_mask(dev->wmask + PCI_BRIDGE_CONTROL,
> > >                                   PCI_BRIDGE_CTL_SERR);
> > > that means that the OS *is able* to turn on/off SERR forwarding.
> > Hi marcel,
> >
> > I saw the OS that turn on SERR# is to via evaluate _HPP (Hot Plug Parameters) 
> > method in ACPI.
> >   it the only way to turn on SERR#?
This is strange, I don't see how it is connected.

> I saw there was one option do it, called*//*PCI SERR# Generation **searched 
> from web pages in firmware on hardware****.
> Do it turn on the SERR#? if so, we can enable it in seabios.
Indeed, OS/firmware are in charge of setting this bit.
We *could* do it in BIOS, but not before checking how the OS is handling it
I suggest checking the pci(e) bridge initialization code in Linux Kernel and 
only
then decide how to proceed.
You can also look(grep) for this ...CTL_ERR in the kernel code
and try to figure that out.

Thanks,
Marcel

> Thanks,
> Chen
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