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[Qemu-devel] [PULL 25/30] target-mips: Use local float status pointer ac
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From: |
Leon Alrae |
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Subject: |
[Qemu-devel] [PULL 25/30] target-mips: Use local float status pointer across MSA macros |
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Date: |
Tue, 16 Dec 2014 19:49:11 +0000 |
From: "Maciej W. Rozycki" <address@hidden>
Reduce line wrapping throughout MSA helper macros by using a local float
status pointer rather than referring to the float status through the
environment each time. No functional change.
Signed-off-by: Maciej W. Rozycki <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/msa_helper.c | 69 ++++++++++++++++++++++++------------------------
1 file changed, 34 insertions(+), 35 deletions(-)
diff --git a/target-mips/msa_helper.c b/target-mips/msa_helper.c
index b08f37f..6e07f6e 100644
--- a/target-mips/msa_helper.c
+++ b/target-mips/msa_helper.c
@@ -1782,15 +1782,14 @@ static inline int32 float64_to_q32(float64 a
STATUS_PARAM)
#define MSA_FLOAT_COND(DEST, OP, ARG1, ARG2, BITS, QUIET) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
int64_t cond; \
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
if (!QUIET) { \
- cond = float ## BITS ## _ ## OP(ARG1, ARG2, \
- &env->active_tc.msa_fp_status); \
+ cond = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
} else { \
- cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, \
- &env->active_tc.msa_fp_status); \
+ cond = float ## BITS ## _ ## OP ## _quiet(ARG1, ARG2, status); \
} \
DEST = cond ? M_MAX_UINT(BITS) : 0; \
c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \
@@ -2375,11 +2374,11 @@ void helper_msa_fsne_df(CPUMIPSState *env, uint32_t df,
uint32_t wd,
#define MSA_FLOAT_BINOP(DEST, OP, ARG1, ARG2, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## OP(ARG1, ARG2, \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -2511,11 +2510,11 @@ void helper_msa_fdiv_df(CPUMIPSState *env, uint32_t df,
uint32_t wd,
#define MSA_FLOAT_MULADD(DEST, ARG1, ARG2, ARG3, NEGATE, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _muladd(ARG2, ARG3, ARG1, NEGATE, status); \
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -2630,10 +2629,11 @@ void helper_msa_fexp2_df(CPUMIPSState *env, uint32_t
df, uint32_t wd,
#define MSA_FLOAT_UNOP(DEST, OP, ARG, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## OP(ARG, &env->active_tc.msa_fp_status);\
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## OP(ARG, status); \
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -2678,10 +2678,11 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t
df, uint32_t wd,
#define MSA_FLOAT_UNOP_XD(DEST, OP, ARG, BITS, XBITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## OP(ARG, &env->active_tc.msa_fp_status);\
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## OP(ARG, status); \
c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -2728,11 +2729,11 @@ void helper_msa_ftq_df(CPUMIPSState *env, uint32_t df,
uint32_t wd,
#define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## OP(ARG1, ARG2, \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## OP(ARG1, ARG2, status); \
c = update_msacsr(env, 0, 0); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -2924,10 +2925,11 @@ void helper_msa_fclass_df(CPUMIPSState *env, uint32_t
df,
#define MSA_FLOAT_UNOP0(DEST, OP, ARG, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## OP(ARG, &env->active_tc.msa_fp_status);\
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## OP(ARG, status); \
c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \
\
if (get_enabled_exceptions(env, c)) { \
@@ -3029,11 +3031,11 @@ void helper_msa_fsqrt_df(CPUMIPSState *env, uint32_t
df, uint32_t wd,
#define MSA_FLOAT_RECIPROCAL(DEST, ARG, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
+ DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \
c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \
float ## BITS ## _is_quiet_nan(DEST) ? \
0 : RECIPROCAL_INEXACT, \
@@ -3138,23 +3140,20 @@ void helper_msa_frint_df(CPUMIPSState *env, uint32_t
df, uint32_t wd,
#define MSA_FLOAT_LOGB(DEST, ARG, BITS) \
do { \
+ float_status *status = &env->active_tc.msa_fp_status; \
int c; \
\
- set_float_exception_flags(0, &env->active_tc.msa_fp_status); \
- set_float_rounding_mode(float_round_down, \
- &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## log2(ARG, \
- &env->active_tc.msa_fp_status); \
- DEST = float ## BITS ## _ ## round_to_int(DEST, \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(0, status); \
+ set_float_rounding_mode(float_round_down, status); \
+ DEST = float ## BITS ## _ ## log2(ARG, status); \
+ DEST = float ## BITS ## _ ## round_to_int(DEST, status); \
set_float_rounding_mode(ieee_rm[(env->active_tc.msacsr & \
MSACSR_RM_MASK) >> MSACSR_RM], \
- &env->active_tc.msa_fp_status); \
+ status); \
\
- set_float_exception_flags( \
- get_float_exception_flags(&env->active_tc.msa_fp_status) \
- & (~float_flag_inexact), \
- &env->active_tc.msa_fp_status); \
+ set_float_exception_flags(get_float_exception_flags(status) & \
+ (~float_flag_inexact), \
+ status); \
\
c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \
\
--
2.1.0
- [Qemu-devel] [PULL 12/30] target-mips: Restore the order of helpers, (continued)
- [Qemu-devel] [PULL 12/30] target-mips: Restore the order of helpers, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 16/30] target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 21/30] target-mips: gdbstub: Clean up FPU register handling, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 22/30] target-mips: Also apply the CP0.Status mask to MTTC0, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 18/30] target-mips: Fix CP0.Config3.ISAOnExc write accesses, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 19/30] target-mips: Tighten ISA level checks, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 23/30] linux-user: Use the 5KEf processor for 64-bit emulation, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 24/30] target-mips: Add missing calls to synchronise SoftFloat status, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 20/30] target-mips: Correct 32-bit address space wrapping, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 26/30] target-mips: Fix DisasContext's ulri member initialization, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 25/30] target-mips: Use local float status pointer across MSA macros,
Leon Alrae <=
- [Qemu-devel] [PULL 27/30] target-mips: convert single case switch into if statement, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 28/30] disas/mips: remove unused mips_msa_control_names_numeric[32], Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 30/30] target-mips: remove excp_names[] from linux-user as it is unused, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 29/30] disas/mips: disable unused mips16_to_32_reg_map[], Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 05/30] target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 07/30] target-mips: Fix formatting in `decode_extended_mips16_opc', Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 06/30] target-mips: Enable vectored interrupt support for the 74Kf CPU, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 04/30] target-mips: Make CP0.Config4 and CP0.Config5 registers signed, Leon Alrae, 2014/12/16
- [Qemu-devel] [PULL 08/30] target-mips: Fix formatting in `mips_defs', Leon Alrae, 2014/12/16
- Re: [Qemu-devel] [PULL 00/30] target-mips queue, Peter Maydell, 2014/12/17