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Re: [Qemu-devel] Atomic Instructions - comments please


From: Mark Burton
Subject: Re: [Qemu-devel] Atomic Instructions - comments please
Date: Mon, 15 Dec 2014 14:37:24 +0100

(not address of mttcg list server)

> On 15 Dec 2014, at 14:32, Paolo Bonzini <address@hidden> wrote:
> 
> 
> 
> On 15/12/2014 14:28, Peter Maydell wrote:
>> Personally I would start out with this approach. We're going to
>> need a "do this whole sequence atomically wrt other guest CPUs"
>> mechanism anyway, so it's not implementing something we wouldn't
>> otherwise need. And it's the simple thing to do. It's certainly
>> possible to do a more architecturally correct ld/st exclusive
>> implementation along the lines of how we manage TB invalidation
>> with the dirty bitmap, but if we can do without it then we
>> should try to keep the scope of this project constrained: it's
>> a big enough job as it is.
> 
> How would "add a mutex" work unless you add a mutex or CAS to each and
> every qemu_st operation?

it’ll do what it does now…. e.g. it won’t ‘work’ the way the architecture is 
defined…. but it will work as well as it does now….

Cheers

Mark

> 
> Paolo


         +44 (0)20 7100 3485 x 210
+33 (0)5 33 52 01 77x 210

        +33 (0)603762104
        mark.burton




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