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[Qemu-devel] [PATCH V2 5/6] acpi:cpu hotplug: set pcmachine as icc bus'


From: Gu Zheng
Subject: [Qemu-devel] [PATCH V2 5/6] acpi:cpu hotplug: set pcmachine as icc bus' hotplug handler
Date: Fri, 12 Dec 2014 15:43:57 +0800

As the pre-check in the qdev_device_add():
    if (qdev_hotplug && bus && !qbus_is_hotpluggable(bus)) {
        qerror_report(QERR_BUS_NO_HOTPLUG, bus->name);
        return NULL;
    }
if device has parent bus, the bus must have valid hotplug_handler,
otherwise can not hot plug.
Currently cpu hotplug is based on the PCMachine's hotplug handler,
so when hot add cpu, the hotpluggable check of icc bus will be
rejected.
So we set pcmachine as icc bus' hotplug handler to avoid the rejetion.

Signed-off-by: Gu Zheng <address@hidden>
Signed-off-by: Zhu Guihua <address@hidden>

---
v2: introduce a help function to hide the access to icc_bus.

 hw/cpu/icc_bus.c         |    5 +++++
 hw/i386/pc_piix.c        |    5 +++++
 hw/i386/pc_q35.c         |    5 +++++
 include/hw/cpu/icc_bus.h |    2 ++
 4 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/hw/cpu/icc_bus.c b/hw/cpu/icc_bus.c
index 6646ea2..a933813 100644
--- a/hw/cpu/icc_bus.c
+++ b/hw/cpu/icc_bus.c
@@ -92,6 +92,11 @@ static void icc_bridge_init(Object *obj)
     s->icc_bus.apic_address_space = &s->apic_container;
 }
 
+ICCBus *get_icc_bus(DeviceState *dev)
+{
+    return &ICC_BRIDGE(dev)->icc_bus;
+}
+
 static void icc_bridge_class_init(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 85ed3c8..1825d30 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -281,6 +281,7 @@ static void pc_init1(MachineState *machine,
     if (pci_enabled && acpi_enabled) {
         DeviceState *piix4_pm;
         I2CBus *smbus;
+        ICCBus *iccbus;
 
         smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
         /* TODO: Populate SPD eeprom data.  */
@@ -296,6 +297,10 @@ static void pc_init1(MachineState *machine,
                                  OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
         object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
                                  PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
+
+        iccbus = get_icc_bus(icc_bridge);
+        object_property_set_link(OBJECT(iccbus), OBJECT(pc_machine),
+                                 QDEV_HOTPLUG_HANDLER_PROPERTY, &error_abort);
     }
 
     if (pci_enabled) {
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 0262b5e..1053271 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -88,6 +88,7 @@ static void pc_q35_init(MachineState *machine)
     PcGuestInfo *guest_info;
     ram_addr_t lowmem;
     DriveInfo *hd[MAX_SATA_PORTS];
+    ICCBus *iccbus;
 
     /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory
      * and 256 Mbytes for PCI Express Enhanced Configuration Access Mapping
@@ -212,6 +213,10 @@ static void pc_q35_init(MachineState *machine)
     object_property_set_link(OBJECT(machine), OBJECT(lpc),
                              PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
 
+    iccbus = get_icc_bus(icc_bridge);
+    object_property_set_link(OBJECT(iccbus), OBJECT(pc_machine),
+                             QDEV_HOTPLUG_HANDLER_PROPERTY, &error_abort);
+
     ich9_lpc = ICH9_LPC_DEVICE(lpc);
     ich9_lpc->pic = gsi;
     ich9_lpc->ioapic = gsi_state->ioapic_irq;
diff --git a/include/hw/cpu/icc_bus.h b/include/hw/cpu/icc_bus.h
index 98a979f..7e53afb 100644
--- a/include/hw/cpu/icc_bus.h
+++ b/include/hw/cpu/icc_bus.h
@@ -44,6 +44,8 @@ typedef struct ICCBus {
 
 #define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS)
 
+ICCBus *get_icc_bus(DeviceState *dev);
+
 /**
  * ICCDevice:
  *
-- 
1.7.7




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