[Qemu-devel] [PATCH] target-mips: Fix DisasContext's ulri member initialization

[Maciej W. Rozycki]

Set DisasContext's ulri member to 0 or 1 as with other bool members.

Signed-off-by: Maciej W. Rozycki <address@hidden>
---
qemu-mips-disas-ulri.diff
Index: qemu-git-trunk/target-mips/translate.c
===================================================================
--- qemu-git-trunk.orig/target-mips/translate.c 2014-12-02 21:28:17.528936640 
+0000
+++ qemu-git-trunk/target-mips/translate.c      2014-12-02 21:28:41.028928249 
+0000
@@ -19114,7 +19114,7 @@ gen_intermediate_code_internal(MIPSCPU *
     ctx.bp = (env->CP0_Config3 >> CP0C3_BP) & 1;
     /* Restore delay slot state from the tb context.  */
     ctx.hflags = (uint32_t)tb->flags; /* FIXME: maybe use 64 bits here? */
-    ctx.ulri = env->CP0_Config3 & (1 << CP0C3_ULRI);
+    ctx.ulri = (env->CP0_Config3 >> CP0C3_ULRI) & 1;
     restore_cpu_state(env, &ctx);
 #ifdef CONFIG_USER_ONLY
         ctx.mem_idx = MIPS_HFLAG_UM;