Re: [Qemu-devel] [RFC v2 0/4] Add Generic PCI host device update

[alvise rigo]

On Mon, Nov 24, 2014 at 4:50 PM, Claudio Fontana
<address@hidden> wrote:
> Another general question about this series use:
>
> why do all these other devices that are unrelated to the virt platform show 
> up?

There are two devices added to the platform by default in mach-virt.
Look at the end of create_pci_host() in virt.c, you will find that a
pci-ohci and a lsi53c895a device are created.

> Here I am running on the guest with just virtio-net, virtio-blk and 
> virtio-rng:
>
> (qemu) info pci
>   Bus  0, device   0, function 0:
>     Class 2880: PCI device 1b36:1234
>       id ""
>   Bus  0, device   1, function 0:
>     USB controller: PCI device 106b:003f
>       IRQ 0.
>       BAR0: 32 bit memory at 0xffffffffffffffff [0x000000fe].
>       id ""
>   Bus  0, device   2, function 0:
>     SCSI controller: PCI device 1000:0012
>       IRQ 0.
>       BAR0: I/O at 0xffffffffffffffff [0x00fe].
>       BAR1: 32 bit memory at 0xffffffffffffffff [0x000003fe].
>       BAR2: 32 bit memory at 0xffffffffffffffff [0x00001ffe].
>       id ""
>   Bus  0, device   3, function 0:
>     SCSI controller: PCI device 1af4:1001
>       IRQ 0.
>       BAR0: I/O at 0x0100 [0x013f].
>       id "blk0"
>   Bus  0, device   4, function 0:
>     Class 0255: PCI device 1af4:1005
>       IRQ 0.
>       BAR0: I/O at 0x0140 [0x015f].
>       id ""
>   Bus  0, device   5, function 0:
>     Ethernet controller: PCI device 1af4:1000
>       IRQ 0.
>       BAR0: I/O at 0x0160 [0x017f].
>       BAR6: 32 bit memory at 0xffffffffffffffff [0x0003fffe].
>       id ""
>
> Also what is the BAR6 for the virtio-net device? I am struggling to 
> understand where it is coming from...

I think it has to do with the efi-virtio.rom which is supplied to the
virtio-net-pci device.
At the end of pci_add_option_rom() in hw/pci/pci.c you will see the
sixth bar registered.

alvise

>
> Thanks,
>
> Claudio
>
> On 21.11.2014 19:07, Alvise Rigo wrote:
>> This patch series is based on the previous work [1] and [2] by Rob
>> Herring and on [3] by myself.  For sake of readability and since this is
>> still a RFC, these patches come as a stand alone work, so there's no
>> need to apply first [1][2][3].  it tries to enhance this work on these
>> points:
>>
>> Improvements from v1:
>>
>> - The code should be general enough to allow the use of the controller
>>   with other platforms, not only with mach-virt.  The only assumption
>>   made is that a GIC v2 is used at guest side (the interrupt-map
>>   property describes the parent interrupts using the three cells
>>   format).
>> - The interrupt-map node generation has been enhanced in the following
>>   aspects:
>>   - support of multi-function PCI device has been added
>>   - a PCI device can now use an interrupt pin different from #INTA
>>
>> Since some other works like [4] require to modify the device tree only
>> when all the devices have been instantiated, the PATCH[1/4] proposes a
>> solution for mach-virt to allow multiple agents (e.g., generic-pci,
>> VFIO) to modify the device tree. The approach in simple: a global list
>> is kept to store all the routines that perform the modification of the
>> device tree. Eventually, when the machine is completed, all these
>> routines are sequentially executed and the kernel is loaded to the guest
>> by mean of a machine_init_done_notifier.
>> In the context of this patch, here are some questions:
>> Rather than postponing the arm_load_kernel call as this patch does,
>> should we use instead the modify_dtb call provided by arm_boot_info to
>> modify the device tree?
>> If so, shouldn't modify_dtb be used to modify only *user* provided
>> device trees?
>>
>> This work has been tested attaching several PCI devices to the mach-virt
>> platform using an ARMv7 CPU. The tested devices are: virtio-blk-pci,
>> virtio-net-pci, lsi53c895a and pci-ohci (all attached at the same time).
>>
>> TODO:
>> - Add MSI, MSI-X support
>> - PCI-E support. Due to a lack of devices, this part is a bit hard to
>>   accomplish at the moment.
>>
>> Thank you, alvise
>>
>> [1]
>> "[Qemu-devel] [RFC PATCH 1/2] hw/pci-host: add a generic PCI host"
>> http://lists.gnu.org/archive/html/qemu-devel/2014-06/msg03482.html
>> [2]
>> "[Qemu-devel] [RFC PATCH 2/2] hw/arm/virt: Add generic PCI host device"
>> http://lists.gnu.org/archive/html/qemu-devel/2014-06/msg03483.html
>> [3]
>> "[Qemu-devel] [RFC PATCH 0/8] Add Generic PCI host device update"
>> https://lists.gnu.org/archive/html/qemu-devel/2014-07/msg01957.html
>> [4]
>> http://lists.nongnu.org/archive/html/qemu-devel/2014-10/msg03816.html
>>
>> Alvise Rigo (4):
>>   hw/arm/virt: Allow multiple agents to modify dt
>>   hw/arm/virt: find_machine_info: handle NULL value
>>   hw/pci-host: Add a generic PCI host controller for virtual platforms
>>   hw/arm/virt: Add generic-pci device support
>>
>>  hw/arm/virt.c                     | 114 +++++++++++++++-
>>  hw/pci-host/Makefile.objs         |   2 +-
>>  hw/pci-host/generic-pci.c         | 280 
>> ++++++++++++++++++++++++++++++++++++++
>>  include/hw/pci-host/generic-pci.h |  74 ++++++++++
>>  4 files changed, 468 insertions(+), 2 deletions(-)
>>  create mode 100644 hw/pci-host/generic-pci.c
>>  create mode 100644 include/hw/pci-host/generic-pci.h
>>
>
>
> --
> Claudio Fontana
> Server Virtualization Architect
> Huawei Technologies Duesseldorf GmbH
> Riesstraße 25 - 80992 München
>
> office: +49 89 158834 4135
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