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Re: [Qemu-devel] qemu arm gic assert failed.
From: |
Johan Karlsson |
Subject: |
Re: [Qemu-devel] qemu arm gic assert failed. |
Date: |
Thu, 13 Nov 2014 15:25:59 +0000 |
> -----Original Message-----
> From: Christoffer Dall [mailto:address@hidden
> Sent: den 13 november 2014 15:28
> On Thu, Nov 13, 2014 at 1:44 PM, Johan Karlsson
> <address@hidden> wrote:
> > Hi,
> > Enabled DEBUG_GIC in arm_gic.c
> >
> > Use case:
> > Core0 wakes up core1 using irq and then core1 acks and runs eoi until it
> gets 0x3ff.
> > Note that core1 do not have interrupts enabled and does this in SVC.
> >
> > From what I can see s->current_pending[1] isn't updated in gic_update
> because the following
> > if (!s->enabled || !s->cpu_enabled[cpu]) {
> > qemu_irq_lower(s->parent_irq[cpu]);
> > return;
> > }
> > Is true for core0 after the first ack from core1 causing gic_update to
> > return
> before updating core1.
> >
> It was recently discussed on a previous thread that this is a bug in the QEMU,
> the return statement above should be a 'continue;'
>
> Does that solve your issue?
>
> -Christoffer
Yes I tried that and it works, however I didn't analyse if it was correct or
not.
But it didn't feel right to return from a function that loops over all cores
based on a state of one core.
/Johan