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[Qemu-devel] [PACTH v4 0/6] ARM: add PSCI 0.2 support in TCG mode
From: |
Ard Biesheuvel |
Subject: |
[Qemu-devel] [PACTH v4 0/6] ARM: add PSCI 0.2 support in TCG mode |
Date: |
Wed, 10 Sep 2014 09:02:45 +0200 |
This series adds PSCI support to ARM and AArch64 system emulation when running
in TCG mode. As PSCI calls can be made using either hypervisor call (HVC) or
secure monitor call (SMC) instructions, support is added for handling those
in patch #3 before patch #5 adds the actual PSCI dispatch logic. Patch #6
enables PSCI for the mach-virt platform.
Changes since v3:
- added some R-b's
- remove user mode interrupt handler for AArch32 as well
- update the SMC and HVC handling logic to
. take feature bits for EL2 and EL3 into account
. deal with conditional execution state in A32/T32
. add ARCH() and IS_USER()/current_pl tests where appropriate
- added some missing () in the PSCI constants
- update the PSCI dispatch logic to
. CPU_ON: take bit 0 of the entry point into account to either set the Thumb
state or return an error, and assert that the onlined CPU is in the same
mode as the calling CPU
. CPU_OFF: call cpu_loop_exit() directly
. CPU_SUSPEND; use helper_wfi()
. follow the PSCI spec and adopt the name 'conduit' to refer to the type of
instruction used to invoke PSCI functions
. check the conduit in the translation stage to avoid advancing the single
step state machine inadvertently
- remove smp restriction from mach-virt running in TCG mode
Changes since v2:
- added path #4 to introduce QEMU counterparts of the kernel PSCI constants we
refer to in the PSCI emulation, this is needed so QEMU can be built in
environments that don't supply the PSCI header file.
Changes since v1:
- processed first round of review, that was already given when this series was
sent out by Rob himself back in May
*** BLURB HERE ***
Ard Biesheuvel (1):
target-arm: add missing PSCI constants needed for PSCI emulation
Rob Herring (5):
target-arm: add powered off cpu state
target-arm: do not set do_interrupt handlers for ARM and AArch64 user
modes
target-arm: add hvc and smc exception emulation handling
infrastructure
target-arm: add emulation of PSCI calls for system emulation
arm/virt: enable PSCI emulation support for system emulation
hw/arm/virt.c | 82 ++++++++++----------
target-arm/Makefile.objs | 1 +
target-arm/cpu-qom.h | 11 +++
target-arm/cpu.c | 19 +++--
target-arm/cpu.h | 8 ++
target-arm/cpu64.c | 2 +
target-arm/helper-a64.c | 19 +++++
target-arm/helper.c | 40 ++++++++--
target-arm/internals.h | 20 +++++
target-arm/kvm-consts.h | 40 ++++++++++
target-arm/machine.c | 5 +-
target-arm/psci.c | 183 +++++++++++++++++++++++++++++++++++++++++++++
target-arm/translate-a64.c | 38 +++++++---
target-arm/translate.c | 59 ++++++++++++---
target-arm/translate.h | 4 +
15 files changed, 455 insertions(+), 76 deletions(-)
create mode 100644 target-arm/psci.c
--
1.8.3.2
- [Qemu-devel] [PACTH v4 0/6] ARM: add PSCI 0.2 support in TCG mode,
Ard Biesheuvel <=
- [Qemu-devel] [PACTH v4 2/6] target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes, Ard Biesheuvel, 2014/09/10
- [Qemu-devel] [PACTH v4 1/6] target-arm: add powered off cpu state, Ard Biesheuvel, 2014/09/10
- [Qemu-devel] [PACTH v4 3/6] target-arm: add hvc and smc exception emulation handling infrastructure, Ard Biesheuvel, 2014/09/10
- [Qemu-devel] [PACTH v4 4/6] target-arm: add missing PSCI constants needed for PSCI emulation, Ard Biesheuvel, 2014/09/10
- [Qemu-devel] [PACTH v4 5/6] target-arm: add emulation of PSCI calls for system emulation, Ard Biesheuvel, 2014/09/10
- [Qemu-devel] [PACTH v4 6/6] arm/virt: enable PSCI emulation support for system emulation, Ard Biesheuvel, 2014/09/10