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[Qemu-devel] [PULL 26/52] target-ppc: Bug Fix: rlwinm
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 26/52] target-ppc: Bug Fix: rlwinm |
Date: |
Thu, 4 Sep 2014 19:20:14 +0200 |
From: Tom Musta <address@hidden>
The rlwinm specification includes the ROTL32 operation, which is defined
to be a left rotation of two copies of the least significant 32 bits of
the source GPR.
The current implementation is incorrect on 64-bit implementations in that
it rotates a single copy of the least significant 32 bits, padding with
zeroes in the most significant bits.
Fix the code to properly implement this ROTL32 operation.
Example:
R3 = F7487D82EC6F75DF
rlwinm 3,3,5,12,4
R3 expected : 8DEEBBFD880EBBFD
R3 actual : 00000000880EBBFD (without this fix)
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/translate.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c07bb01..44a8e1e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1675,11 +1675,9 @@ static void gen_rlwinm(DisasContext *ctx)
} else {
TCGv t0 = tcg_temp_new();
#if defined(TARGET_PPC64)
- TCGv_i32 t1 = tcg_temp_new_i32();
- tcg_gen_trunc_i64_i32(t1, cpu_gpr[rS(ctx->opcode)]);
- tcg_gen_rotli_i32(t1, t1, sh);
- tcg_gen_extu_i32_i64(t0, t1);
- tcg_temp_free_i32(t1);
+ tcg_gen_deposit_i64(t0, cpu_gpr[rS(ctx->opcode)],
+ cpu_gpr[rS(ctx->opcode)], 32, 32);
+ tcg_gen_rotli_i64(t0, t0, sh);
#else
tcg_gen_rotli_i32(t0, cpu_gpr[rS(ctx->opcode)], sh);
#endif
--
1.8.1.4
- [Qemu-devel] [PULL 06/52] linux-user: Properly Dereference PPC64 ELFv1 Signal Handler Pointer, (continued)
- [Qemu-devel] [PULL 06/52] linux-user: Properly Dereference PPC64 ELFv1 Signal Handler Pointer, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 18/52] spapr: Fix ibm, associativity for memory nodes, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 19/52] loader: Add load_image_size() to replace load_image(), Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 14/52] spapr: Use DT memory node rendering helper for other nodes, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 11/52] PPC: mac99: Move NVRAM to page boundary when necessary, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 21/52] ppc: debug stub: Get trap instruction opcode from KVM, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 23/52] ppc: Add software breakpoint support, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 20/52] spapr: Locate RTAS and device-tree based on real RMA, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 22/52] ppc: synchronize excp_vectors for injecting exception, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 27/52] target-ppc: Bug Fix: rlwnm, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 26/52] target-ppc: Bug Fix: rlwinm,
Alexander Graf <=
- [Qemu-devel] [PULL 24/52] ppc: Add hw breakpoint watchpoint support, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 33/52] target-ppc: Bug Fix: srad, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 25/52] ppc/spapr: Fix MAX_CPUS to 255, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 35/52] PPC: KVM: Use vm check_extension for pv hcall, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 28/52] target-ppc: Bug Fix: rlwimi, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 30/52] target-ppc: Bug Fix: mullw, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 37/52] PPC: mac_nvram: Remove unused functions, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 29/52] target-ppc: Bug Fix: mullwo, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 36/52] PPC: mac99: Fix core99 timer frequency, Alexander Graf, 2014/09/04
- [Qemu-devel] [PULL 31/52] target-ppc: Bug Fix: mulldo OV Detection, Alexander Graf, 2014/09/04