Re: [Qemu-devel] [PATCH v3 1/2] hw/misc/arm_sp810: Create SP810 device

[Peter Crosthwaite]

On Fri, Aug 22, 2014 at 6:53 PM, Peter Maydell <address@hidden> wrote:
> On 22 August 2014 09:38, Aggeler  Fabian <address@hidden> wrote:
>>
>> On 19 Aug 2014, at 16:03, Peter Maydell <address@hidden> wrote:
>>> Which input signals in the hardware do these properties
>>> correspond to? I can't figure out what the mapping is.
>>> As far as I can tell from the documentation the bits
>>> in SCCTRL are just always reset to 0 and are not
>>> controlled by external signals (which is what qdev
>>> properties should typically correspond to).
>>
>> Actually I don’t know how it is done in hardware. My goal was
>> to reflect the default speed of the SP804 timer in QEMU’s vexpress
>> emulation in the SCCTRL. What do you suggest in this case?
>
> Well, fundamentally you have to find out what the hardware
> does, and do that. We can't model anything else.
>

With no actual clock muxing support it makes sense to me to pin the
register value to a hardwired setting. This as least allows a guest to
self-identify the one and only supported clocking setup without the
need for dummy firmware.

To do what the hardware does and have this value at it's docced reset
you would really want to add the clock frequency selection support
which means propagating the numbers through to timers etc making this
series much more complicated.

Regards,
Peter

>> I could remove the QOM properties and set the reset value of the
>> TimerEnXSel bits in SCCTRL to 1 (TIMCLK) to match the SCCTRL
>> with the speed of the SP804.
>
> The h/w docs suggest the reset value is 0.
> I have a feeling you may be attempting to make QEMU's
> hardware model include behaviour which is the result of
> firmware code setting register values before booting the
> kernel...
>
> thanks
> -- PMM
>