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Re: [Qemu-devel] [PATCH v2 0/5] AArch64 TLB performance improvements
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH v2 0/5] AArch64 TLB performance improvements |
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Date: |
Wed, 06 Aug 2014 10:32:10 -1000 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.7.0 |
On 08/01/2014 12:26 PM, Peter Maydell wrote:
> So I think it would be good if we investigated the degree
> of difficulty in improving QEMU's TLB code so it isn't just
> "one TLB entry size with larger pages a bolt-on which we
> hope people don't actually use" first, before we just disable
> all the v5 CPUs.
I suspect the overhead of making the guest page size variable
will be less than the improvement that can be had in doing so.
Supporting multiple page sizes simultaneously, as with "huge pages", is
probably unfeasible.
r~