[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 06/12] target-arm: A64: Respect SPSEL when taking exc
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 06/12] target-arm: A64: Respect SPSEL when taking exceptions |
Date: |
Mon, 4 Aug 2014 14:53:22 +0100 |
From: "Edgar E. Iglesias" <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Greg Bellows <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper-a64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 2b4ce6a..027434a 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -489,8 +489,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
if (is_a64(env)) {
env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env);
- env->sp_el[arm_current_pl(env)] = env->xregs[31];
- env->xregs[31] = env->sp_el[1];
+ aarch64_save_sp(env, arm_current_pl(env));
env->elr_el[1] = env->pc;
} else {
env->banked_spsr[0] = cpsr_read(env);
@@ -508,6 +507,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
pstate_write(env, PSTATE_DAIF | PSTATE_MODE_EL1h);
env->aarch64 = 1;
+ aarch64_restore_sp(env, 1);
env->pc = addr;
cs->interrupt_request |= CPU_INTERRUPT_EXITTB;
--
1.9.1
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 11/12] target-arm: don't hardcode mask values in arm_cpu_handle_mmu_fault, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 12/12] target-arm: A64: fix TLB flush instructions, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 10/12] target-arm: Fix bit test in sp_el0_access, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 02/12] hw/arm/virt: formatting: memory map, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 03/12] sd: sdhci: Fix ADMA dma_memory_read access, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 08/12] target-arm: Add ESR_EL2 and 3, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 06/12] target-arm: A64: Respect SPSEL when taking exceptions,
Peter Maydell <=
- [Qemu-devel] [PULL 09/12] target-arm: Add FAR_EL2 and 3, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 01/12] hw/arm/boot: Set PC correctly when loading AArch64 ELF files, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 07/12] target-arm: Make far_el1 an array, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 05/12] target-arm: A64: Respect SPSEL in ERET SP restore, Peter Maydell, 2014/08/04
- [Qemu-devel] [PULL 04/12] target-arm: A64: Break out aarch64_save/restore_sp, Peter Maydell, 2014/08/04
- Re: [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2014/08/04