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Re: [Qemu-devel] About AddressSpace in intel-iommu emulation


From: Le Tan
Subject: Re: [Qemu-devel] About AddressSpace in intel-iommu emulation
Date: Fri, 27 Jun 2014 13:46:20 +0800

2014-06-27 12:55 GMT+08:00 Paolo Bonzini <address@hidden>:
> Il 27/06/2014 04:08, Le Tan ha scritto:
>
>> 1. In struct IOMMUTLBEntry, I think the addr_mask field should be the
>> mask of the page offset, right? But I see different usages of this
>> field. In spapr_tce_translate_iommu(), the addr_mask field is assigned
>> with the mask of the page offset. However, in pbm_translate_iommu(),
>> in the passthrough case, the addr_mask field seems to be assigned the
>> mask of the page number. Is there any problem here?
>
>
> The intended usage is the one of spapr_tce_translate_iommu().  In practice
> it doesn't matter, both work.
>
>
>> 2. For q35, how to identify origination of DMA requests? The VT-d
>> manual says we should use source-id(for PCI-Express devices, it is
>> requester identifier) to map devices to domains. What is the related
>> part in QEMU? Where can I get the source-id of a DMA request?
>
>
> You need to create a different AddressSpace for each PCI bus or device.

How to create a different AddressSpace for each device? I thought a
AddressSpace just belongs to a PCI bus before. The paging structures
for different functions of the same device can also be different, too.
So maybe we should create a different AddressSpace for each function?
How to achieve it? Could you give me some more hints or is there any
existing example in QEMU?
Thanks very much!

Le

> Paolo



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