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[Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages |
Date: |
Thu, 5 Jun 2014 16:22:14 +0200 |
Given the simplifications to the code in the previous patches, this
is now very simple to do.
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/cpu.c | 4 +---
target-i386/helper.c | 7 +++++++
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 042a48d..0f400d4 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -569,9 +569,7 @@ struct X86CPUDefinition {
CPUID_EXT_RDRAND */
#define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \
CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
- CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
- /* missing:
- CPUID_EXT2_PDPE1GB */
+ CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_PDPE1GB)
#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
#define TCG_SVM_FEATURES 0
diff --git a/target-i386/helper.c b/target-i386/helper.c
index d09e1c8..5a50364 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -605,6 +605,13 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr,
pdpe |= PG_ACCESSED_MASK;
stl_phys_notdirty(cs->as, pdpe_addr, pdpe);
}
+ if (pdpe & PG_PSE_MASK) {
+ /* 1 GB page */
+ page_size = 1024 * 1024 * 1024;
+ pte_addr = pdpe_addr;
+ pte = pdpe;
+ goto do_check_protect;
+ }
} else
#endif
{
--
1.8.3.1
- [Qemu-devel] [PULL 16/33] target-i386: fix kernel accesses with SMAP and CPL = 3, (continued)
- [Qemu-devel] [PULL 16/33] target-i386: fix kernel accesses with SMAP and CPL = 3, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 15/33] target-i386: move check_io helpers to seg_helper.c, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 17/33] target-i386: simplify SMAP handling in MMU_KSMAP_IDX, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 14/33] target-i386: rename KSMAP to KNOSMAP, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 18/33] target-i386: fix coding standards in x86_cpu_handle_mmu_fault, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 20/33] target-i386: commonize checks for 4MB and 4KB pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 19/33] target-i386: commonize checks for 2MB and 4KB pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 21/33] target-i386: commonize checks for PAE and non-PAE, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 23/33] target-i386: introduce do_check_protect label, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 22/33] target-i386: tweak handling of PG_NX_MASK, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 24/33] target-i386: introduce support for 1 GB pages,
Paolo Bonzini <=
- [Qemu-devel] [PULL 26/33] target-i386: test reserved PS bit on PML4Es, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 25/33] target-i386: set correct error code for reserved bit access, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 27/33] target-i386: raise page fault for reserved physical address bits, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 28/33] target-i386: simplify pte/vaddr calculation, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 29/33] target-i386: unify reserved bits and NX bit check, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 31/33] target-i386: support long addresses for 4MB pages (PSE-36), Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 30/33] target-i386: raise page fault for reserved bits in large pages, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 32/33] target-i386: fix protection bits in the TLB for SMEP, Paolo Bonzini, 2014/06/05
- [Qemu-devel] [PULL 33/33] target-i386: cleanup x86_cpu_get_phys_page_debug, Paolo Bonzini, 2014/06/05
- Re: [Qemu-devel] [PULL 00/33] softmmu cleanups and target-i386 paging fixes, Peter Maydell, 2014/06/05