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Re: [Qemu-devel] [v2 PATCH] target-mips: implement UserLocal Register


From: James Hogan
Subject: Re: [Qemu-devel] [v2 PATCH] target-mips: implement UserLocal Register
Date: Tue, 27 May 2014 10:47:35 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0

Hi Richard,

On 27/05/14 03:38, Richard Henderson wrote:
> On 05/26/2014 07:32 PM, Petar Jovanovic wrote:
>>
>> ________________________________________
>> From: Richard Henderson address@hidden on behalf of Richard Henderson 
>> address@hidden
>> Sent: Tuesday, May 27, 2014 3:35 AM
>> To: Petar Jovanovic; Petar Jovanovic; address@hidden
>> Cc: address@hidden; James Hogan
>> Subject: Re: [v2 PATCH] target-mips: implement UserLocal Register
>>
>> On 05/26/2014 06:21 PM, Petar Jovanovic wrote:
>>> Because we do not know the content of CP0_HWREna.
>>
>>> We can know the same way we know the content of CP0_Config3.
>>
>> Almost all the bits in CP0_Config3 including ULRI bit are read-only and 
>> preset by
>> hardware, thus checking bit ULRI at translation time is the same as checking 
>> it
>> at execution time. How can we know the content of CP0_HWREna at translation 
>> time?
> 
> That's what tb->flags and env->hflags.  An encoding of cpu state at 
> translation
> time.

I agree for the Config3 bit that it shouldn't change during execution of
the guest so can be done at translation time, but I'm not convinced it's
worth wasting tb->flags bits for CP0_HWREna state which the guest OS is
free to change at any time, just to save a single branch each time it's
used (which could be done in tcg easily enough to avoid the helper).
Only a minority of code uses RDHWR, although admittedly UserLocal is the
most widespread of the RDHWR registers due to it's use for thread local
storage.

A quick and non-scientific look (assuming all code is equal) at my
MIPS32 buildroot userland shows 1286 rdhwrs of UserLocal in 14 million
total lines of objdump (1 in 10929 instructions), and only a handful of
the other rdhwr registers.

Cheers
James



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