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[Qemu-devel] [PULL 05/15] target-i386: set eflags prior to calling svm_l
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 05/15] target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c |
Date: |
Tue, 13 May 2014 14:57:14 +0200 |
From: Kevin O'Connor <address@hidden>
The svm_load_seg_cache() function calls cpu_x86_load_seg_cache() which
inspects env->eflags. So, make sure all changes to eflags are done
prior to loading the segment cache.
Signed-off-by: Kevin O'Connor <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/svm_helper.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
index aa17ecd..848a4b9 100644
--- a/target-i386/svm_helper.c
+++ b/target-i386/svm_helper.c
@@ -703,7 +703,8 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code,
uint64_t exit_info_1)
cpu_load_eflags(env, ldq_phys(cs->as,
env->vm_hsave + offsetof(struct vmcb,
save.rflags)),
- ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
+ ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK |
+ VM_MASK));
CC_OP = CC_OP_EFLAGS;
svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.es),
@@ -756,10 +757,6 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code,
uint64_t exit_info_1)
from the page table indicated the host's CR3. If the PDPEs contain
illegal state, the processor causes a shutdown. */
- /* Forces CR0.PE = 1, RFLAGS.VM = 0. */
- env->cr[0] |= CR0_PE_MASK;
- env->eflags &= ~VM_MASK;
-
/* Disables all breakpoints in the host DR7 register. */
/* Checks the reloaded host state for consistency. */
--
1.8.3.1
- [Qemu-devel] [PULL 00/15] KVM patches for 2014-05-13, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 01/15] target-i386: Remove unused data from local array, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 02/15] kvm: make one_reg helpers available for everyone, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 03/15] pci-assign: Fix a bug when map MSI-X table memory failed, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 04/15] pci-assign: limit # of msix vectors, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 05/15] target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c,
Paolo Bonzini <=
- [Qemu-devel] [PULL 06/15] target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 07/15] target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 08/15] target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly., Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 11/15] target-i386: fix set of registers zeroed on reset, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 12/15] target-i386: preserve FPU and MSR state on INIT, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 09/15] kvm: reset state from the CPU's reset method, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 13/15] apic: do not accept SIPI on the bootstrap processor, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 10/15] kvm: forward INIT signals coming from the chipset, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 14/15] cpu: make CPU_INTERRUPT_RESET available on all targets, Paolo Bonzini, 2014/05/13
- [Qemu-devel] [PULL 15/15] pc: port 92 reset requires a low->high transition, Paolo Bonzini, 2014/05/13