[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [RFC PATCH V3 4/7] target-arm: Provide PSCI v0.2 consta
From: |
Rob Herring |
Subject: |
Re: [Qemu-devel] [RFC PATCH V3 4/7] target-arm: Provide PSCI v0.2 constants to generic QEMU code |
Date: |
Fri, 25 Apr 2014 14:24:45 -0500 |
On Thu, Apr 10, 2014 at 6:46 AM, Pranavkumar Sawargaonkar
<address@hidden> wrote:
> Provide QEMU PSCI v0.2 constants for non-KVM code; this will
> allow us to avoid an #ifdef in boards which set up a PSCI v0.2
> node in the device tree.
>
> Signed-off-by: Pranavkumar Sawargaonkar <address@hidden>
> Signed-off-by: Anup Patel <address@hidden>
> ---
> target-arm/kvm-consts.h | 63
> ++++++++++++++++++++++++++++++++++++++---------
> 1 file changed, 52 insertions(+), 11 deletions(-)
>
> diff --git a/target-arm/kvm-consts.h b/target-arm/kvm-consts.h
> index 6009a33..5cf93ab 100644
> --- a/target-arm/kvm-consts.h
> +++ b/target-arm/kvm-consts.h
> @@ -38,17 +38,58 @@ MISMATCH_CHECK(CP_REG_SIZE_U64, KVM_REG_SIZE_U64)
> MISMATCH_CHECK(CP_REG_ARM, KVM_REG_ARM)
> MISMATCH_CHECK(CP_REG_ARCH_MASK, KVM_REG_ARCH_MASK)
>
> -#define PSCI_FN_BASE 0x95c1ba5e
> -#define PSCI_FN(n) (PSCI_FN_BASE + (n))
> -#define PSCI_FN_CPU_SUSPEND PSCI_FN(0)
> -#define PSCI_FN_CPU_OFF PSCI_FN(1)
> -#define PSCI_FN_CPU_ON PSCI_FN(2)
> -#define PSCI_FN_MIGRATE PSCI_FN(3)
> -
> -MISMATCH_CHECK(PSCI_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
> -MISMATCH_CHECK(PSCI_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
> -MISMATCH_CHECK(PSCI_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
> -MISMATCH_CHECK(PSCI_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
> +/* PSCI v0.1 interface */
> +#define QEMU_PSCI_FN_BASE 0x95c1ba5e
> +#define QEMU_PSCI_FN(n) (QEMU_PSCI_FN_BASE + (n))
> +#define QEMU_PSCI_FN_CPU_SUSPEND QEMU_PSCI_FN(0)
> +#define QEMU_PSCI_FN_CPU_OFF QEMU_PSCI_FN(1)
> +#define QEMU_PSCI_FN_CPU_ON QEMU_PSCI_FN(2)
> +#define QEMU_PSCI_FN_MIGRATE QEMU_PSCI_FN(3)
> +
> +MISMATCH_CHECK(QEMU_PSCI_FN_CPU_SUSPEND, KVM_PSCI_FN_CPU_SUSPEND)
> +MISMATCH_CHECK(QEMU_PSCI_FN_CPU_OFF, KVM_PSCI_FN_CPU_OFF)
> +MISMATCH_CHECK(QEMU_PSCI_FN_CPU_ON, KVM_PSCI_FN_CPU_ON)
> +MISMATCH_CHECK(QEMU_PSCI_FN_MIGRATE, KVM_PSCI_FN_MIGRATE)
> +
> +/* PSCI v0.2 interface */
> +#define QEMU_PSCI_0_2_FN_BASE 0x84000000
> +#define QEMU_PSCI_0_2_FN(n) (QEMU_PSCI_0_2_FN_BASE + (n))
> +#define QEMU_PSCI_0_2_FN64_BASE 0xC4000000
> +#define QEMU_PSCI_0_2_FN64(n) (QEMU_PSCI_0_2_FN64_BASE + (n))
> +#define QEMU_PSCI_0_2_FN_PSCI_VERSION QEMU_PSCI_0_2_FN(0)
> +#define QEMU_PSCI_0_2_FN_CPU_SUSPEND QEMU_PSCI_0_2_FN(1)
> +#define QEMU_PSCI_0_2_FN_CPU_OFF QEMU_PSCI_0_2_FN(2)
> +#define QEMU_PSCI_0_2_FN_CPU_ON QEMU_PSCI_0_2_FN(3)
> +#define QEMU_PSCI_0_2_FN_AFFINITY_INFO QEMU_PSCI_0_2_FN(4)
> +#define QEMU_PSCI_0_2_FN_MIGRATE QEMU_PSCI_0_2_FN(5)
> +#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE QEMU_PSCI_0_2_FN(6)
> +#define QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN(7)
> +#define QEMU_PSCI_0_2_FN_SYSTEM_OFF QEMU_PSCI_0_2_FN(8)
> +#define QEMU_PSCI_0_2_FN_SYSTEM_RESET QEMU_PSCI_0_2_FN(9)
> +#define QEMU_PSCI_0_2_FN64_CPU_SUSPEND QEMU_PSCI_0_2_FN64(1)
> +#define QEMU_PSCI_0_2_FN64_CPU_ON QEMU_PSCI_0_2_FN64(3)
> +#define QEMU_PSCI_0_2_FN64_AFFINITY_INFO QEMU_PSCI_0_2_FN64(4)
> +#define QEMU_PSCI_0_2_FN64_MIGRATE QEMU_PSCI_0_2_FN64(5)
> +#define QEMU_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU QEMU_PSCI_0_2_FN64(7)
> +
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_PSCI_VERSION, PSCI_0_2_FN_PSCI_VERSION)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_SUSPEND, PSCI_0_2_FN_CPU_SUSPEND)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_OFF, PSCI_0_2_FN_CPU_OFF)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_CPU_ON, PSCI_0_2_FN_CPU_ON)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_AFFINITY_INFO, PSCI_0_2_FN_AFFINITY_INFO)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE, PSCI_0_2_FN_MIGRATE)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE_INFO_TYPE, \
> + PSCI_0_2_FN_MIGRATE_INFO_TYPE)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU, \
> + PSCI_0_2_FN_MIGRATE_INFO_UP_CPU)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_SYSTEM_OFF, PSCI_0_2_FN_SYSTEM_OFF)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN_SYSTEM_RESET, PSCI_0_2_FN_SYSTEM_RESET)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_SUSPEND, PSCI_0_2_FN64_CPU_SUSPEND)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_CPU_ON, PSCI_0_2_FN64_CPU_ON)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_AFFINITY_INFO, PSCI_0_2_FN64_AFFINITY_INFO)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE, PSCI_0_2_FN64_MIGRATE)
> +MISMATCH_CHECK(QEMU_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU, \
> + PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU)
I don't see the point of MISMATCH_CHECK with 0.2 PSCI. The values are
fixed and the header is the ABI. Why can't all of QEMU use the psci.h
header?
Rob
- [Qemu-devel] [RFC PATCH V3 0/7] PSCI v0.2 support for KVM ARM/ARM64, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 1/7] linux-headers: Update KVM headers from v3.15, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 2/7] kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 3/7] target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 4/7] target-arm: Provide PSCI v0.2 constants to generic QEMU code, Pranavkumar Sawargaonkar, 2014/04/10
- Re: [Qemu-devel] [RFC PATCH V3 4/7] target-arm: Provide PSCI v0.2 constants to generic QEMU code,
Rob Herring <=
- [Qemu-devel] [RFC PATCH V3 5/7] hw/arm/virt: Use PSCI v0.2 function IDs when kernel supports it, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 6/7] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64, Pranavkumar Sawargaonkar, 2014/04/10
- [Qemu-devel] [RFC PATCH V3 7/7] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64, Pranavkumar Sawargaonkar, 2014/04/10
- Re: [Qemu-devel] [RFC PATCH V3 0/7] PSCI v0.2 support for KVM ARM/ARM64, Peter Maydell, 2014/04/28