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[Qemu-devel] [PATCH 1/2] xilinx_intc: Fix writes into MER register


From: Guenter Roeck
Subject: [Qemu-devel] [PATCH 1/2] xilinx_intc: Fix writes into MER register
Date: Fri, 25 Apr 2014 08:39:47 -0700

The MER register only has two valid bits. This is now used by
the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1
and later to hang when run under qemu-microblaze. Mask valid bits before
writing the register to solve the problem.

Signed-off-by: Guenter Roeck <address@hidden>
---
 hw/intc/xilinx_intc.c |    3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 1b228ff..2aad605 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -121,6 +121,9 @@ pic_write(void *opaque, hwaddr addr,
         case R_CIE:
             p->regs[R_IER] &= ~value; /* Atomic clear ie.  */
             break;
+       case R_MER:
+           p->regs[R_MER] = value & 0x3;
+           break;
         case R_ISR:
             if ((p->regs[R_MER] & 2)) {
                 break;
-- 
1.7.9.7




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