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Re: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rath
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rather than SPR value |
Date: |
Thu, 3 Apr 2014 20:58:27 +0200 |
On 03.04.2014, at 20:55, Peter Maydell <address@hidden> wrote:
> On 3 April 2014 19:48, Alexander Graf <address@hidden> wrote:
>> We now reset SPRs to their reset values on CPU reset. So if we want
>> to have an SPR persistently changed, we need to change its default
>> reset value rather than the value itself manually.
>>
>> Do this for SPR_BOOKE_PIR, fixing e500v2 SMP boot.
>>
>> Reported-by: Frederic Konrad <address@hidden>
>> Signed-off-by: Alexander Graf <address@hidden>
>> ---
>> hw/ppc/e500.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
>> index d7ba25f..f984b3e 100644
>> --- a/hw/ppc/e500.c
>> +++ b/hw/ppc/e500.c
>> @@ -649,7 +649,7 @@ void ppce500_init(QEMUMachineInitArgs *args,
>> PPCE500Params *params)
>> input = (qemu_irq *)env->irq_inputs;
>> irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT];
>> irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT];
>> - env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i;
>> + env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
>
> Not an issue introduced with this patch, but should we really
> be missing with CPUState::cpu_index in a board file?
> (Nowhere else does, it's otherwise simply set to an
> appropriately incremented index by cpu_exec_init().)
> I rather suspect that cpu_index will already be set
> to the value we set it, in any case...
Most likely, but I'd rather not touch that logic for 2.0 :)
Alex