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Re: [Qemu-devel] [PATCH 1/9] softfloat: Introduce float32_to_uint64_roun
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 1/9] softfloat: Introduce float32_to_uint64_round_to_zero |
Date: |
Mon, 31 Mar 2014 18:48:40 +0100 |
On 26 March 2014 20:45, Tom Musta <address@hidden> wrote:
> This change adds the float32_to_uint64_round_to_zero function to the softfloat
> library. This function fills out the complement of float32 to INT
> round-to-zero
> conversion rountines, where INT is {int32_t, uint32_t, int64_t, uint64_t}.
>
> This contribution can be licensed under either the softfloat-2a or -2b
> license.
>
> Signed-off-by: Tom Musta <address@hidden>
> Tested-by: Tom Musta <address@hidden>
> ---
> fpu/softfloat.c | 54
> +++++++++++++++++++++++++++++++++++++++++++++++
> include/fpu/softfloat.h | 1 +
> 2 files changed, 55 insertions(+), 0 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 5f02c16..d6df78a 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1628,6 +1628,60 @@ uint64 float32_to_uint64(float32 a STATUS_PARAM)
>
>
> /*----------------------------------------------------------------------------
> | Returns the result of converting the single-precision floating-point value
> +| `a' to the 64-bit unsigned integer format. The conversion is
> +| performed according to the IEC/IEEE Standard for Binary Floating-Point
> +| Arithmetic, except that the conversion is always rounded toward zero. If
> +| `a' is a NaN, the largest unsigned integer is returned. Otherwise, if the
> +| conversion overflows, the largest unsigned integer is returned. If the
> +| 'a' is negative, the result is rounded and zero is returned; values that do
> +| not round to zero will raise the inexact flag.
> +*----------------------------------------------------------------------------*/
> +
> +uint64 float32_to_uint64_round_to_zero(float32 a STATUS_PARAM)
> +{
> + flag aSign;
> + int_fast16_t aExp, shiftCount;
> + uint32_t aSig;
> + uint64_t aSig64;
> + uint64_t z;
So, float64_to_uint64_round_to_zero() works by temporarily
fiddling with the rounding mode and then calling
float64_to_uint64(). Is there a reason for doing this
function like this rather than in the same way?
thanks
-- PMM
- [Qemu-devel] [PATCH 0/9] target-ppc: VSX Bug Fixes, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 2/9] target-ppc: Bug: VSX Convert to Integer Should Truncate, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 3/9] target-ppc: Define Endian-Correct Accessors for VSR Field Acess, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 4/9] target-ppc: Correct LE Host Inversion of Lower VSRs, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 5/9] target-ppc: Correct Simple VSR LE Host Inversions, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 6/9] target-ppc: Correct VSX Scalar Compares, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 7/9] target-ppc: Correct VSX FP to FP Conversions, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 8/9] target-ppc: Correct VSX FP to Integer Conversion, Tom Musta, 2014/03/26
- [Qemu-devel] [PATCH 9/9] target-ppc: Correct VSX Integer to FP Conversion, Tom Musta, 2014/03/26