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[Qemu-devel] [PULL 111/130] target-ppc: Altivec 2.07: vbpermq Instructio
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 111/130] target-ppc: Altivec 2.07: vbpermq Instruction |
Date: |
Fri, 7 Mar 2014 00:33:58 +0100 |
From: Tom Musta <address@hidden>
This patch adds the Vector Bit Permute Quadword (vbpermq) instruction
introduced in Power ISA Version 2.07.
Signed-off-by: Tom Musta <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 31 +++++++++++++++++++++++++++++++
target-ppc/translate.c | 2 ++
3 files changed, 34 insertions(+)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 1483930..ca1dc83 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -303,6 +303,7 @@ DEF_HELPER_2(vpopcntb, void, avr, avr)
DEF_HELPER_2(vpopcnth, void, avr, avr)
DEF_HELPER_2(vpopcntw, void, avr, avr)
DEF_HELPER_2(vpopcntd, void, avr, avr)
+DEF_HELPER_3(vbpermq, void, avr, avr, avr)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 72fb13c..5885b7e 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -1039,6 +1039,37 @@ void helper_vperm(CPUPPCState *env, ppc_avr_t *r,
ppc_avr_t *a, ppc_avr_t *b,
}
#if defined(HOST_WORDS_BIGENDIAN)
+#define VBPERMQ_INDEX(avr, i) ((avr)->u8[(i)])
+#define VBPERMQ_DW(index) (((index) & 0x40) != 0)
+#else
+#define VBPERMQ_INDEX(avr, i) ((avr)->u8[15-(i)])
+#define VBPERMQ_DW(index) (((index) & 0x40) == 0)
+#endif
+
+void helper_vbpermq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
+{
+ int i;
+ uint64_t perm = 0;
+
+ VECTOR_FOR_INORDER_I(i, u8) {
+ int index = VBPERMQ_INDEX(b, i);
+
+ if (index < 128) {
+ uint64_t mask = (1ull << (63-(index & 0x3F)));
+ if (a->u64[VBPERMQ_DW(index)] & mask) {
+ perm |= (0x8000 >> i);
+ }
+ }
+ }
+
+ r->u64[HI_IDX] = perm;
+ r->u64[LO_IDX] = 0;
+}
+
+#undef VBPERMQ_INDEX
+#undef VBPERMQ_DW
+
+#if defined(HOST_WORDS_BIGENDIAN)
#define PKBIG 1
#else
#define PKBIG 0
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index c4d7f0f..fb7bcbe 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7360,6 +7360,7 @@ GEN_VXFORM_DUAL(vclzw, PPC_NONE, PPC2_ALTIVEC_207, \
vpopcntw, PPC_NONE, PPC2_ALTIVEC_207)
GEN_VXFORM_DUAL(vclzd, PPC_NONE, PPC2_ALTIVEC_207, \
vpopcntd, PPC_NONE, PPC2_ALTIVEC_207)
+GEN_VXFORM(vbpermq, 6, 21);
/*** VSX extension ***/
@@ -10609,6 +10610,7 @@ GEN_VXFORM_DUAL(vclzh, vpopcnth, 1, 29, PPC_NONE,
PPC2_ALTIVEC_207),
GEN_VXFORM_DUAL(vclzw, vpopcntw, 1, 30, PPC_NONE, PPC2_ALTIVEC_207),
GEN_VXFORM_DUAL(vclzd, vpopcntd, 1, 31, PPC_NONE, PPC2_ALTIVEC_207),
+GEN_VXFORM_207(vbpermq, 6, 21),
GEN_HANDLER_E(lxsdx, 0x1F, 0x0C, 0x12, 0, PPC_NONE, PPC2_VSX),
GEN_HANDLER_E(lxsiwax, 0x1F, 0x0C, 0x02, 0, PPC_NONE, PPC2_VSX207),
--
1.8.1.4
- [Qemu-devel] [PULL 100/130] target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions, (continued)
- [Qemu-devel] [PULL 100/130] target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 099/130] target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 106/130] target-ppc: Altivec 2.07: Unpack Signed Word Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 102/130] target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 103/130] target-ppc: Altivec 2.07: Vector Population Count Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 107/130] target-ppc: Altivec 2.07: Vector Merge Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 109/130] target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 105/130] target-ppc: Altivec 2.07: Pack Doubleword Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 108/130] target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 110/130] target-ppc: Altivec 2.07: Quadword Addition and Subtracation, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 111/130] target-ppc: Altivec 2.07: vbpermq Instruction,
Alexander Graf <=
- [Qemu-devel] [PULL 112/130] target-ppc: Altivec 2.07: Doubleword Compares, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 120/130] target-ppc/translate.c: Use ULL suffix for 64 bit constants, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 114/130] target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 118/130] target-ppc: Altivec 2.07: Vector Permute and Exclusive OR, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 119/130] spapr-vlan: flush queue whenever can_receive can go from false to true, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 115/130] target-ppc: Altivec 2.07: Binary Coded Decimal Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 117/130] target-ppc: Altivec 2.07: Vector SHA Sigma Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 113/130] target-ppc: Altivec 2.07: Vector Gather Bits by Bytes, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 116/130] target-ppc: Altivec 2.07: AES Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 089/130] target-ppc: Add Load Quadword and Reserve, Alexander Graf, 2014/03/06