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[Qemu-devel] [PULL 066/130] target-ppc: Add ISA 2.06 ftdiv Instruction
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PULL 066/130] target-ppc: Add ISA 2.06 ftdiv Instruction |
Date: |
Fri, 7 Mar 2014 00:33:13 +0100 |
From: Tom Musta <address@hidden>
This patch adds the Floating Point Test for Divide instruction which
was introduced in Power ISA 2.06B.
Signed-off-by: Tom Musta <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/fpu_helper.c | 56 ++++++++++++++++++++++++++++++++++++++++---------
target-ppc/helper.h | 2 ++
target-ppc/translate.c | 13 ++++++++++++
3 files changed, 61 insertions(+), 10 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 87ff60f..772b135 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -50,6 +50,16 @@ static inline int isden(float64 d)
return ((u.ll >> 52) & 0x7FF) == 0;
}
+static inline int ppc_float32_get_unbiased_exp(float32 f)
+{
+ return ((f >> 23) & 0xFF) - 127;
+}
+
+static inline int ppc_float64_get_unbiased_exp(float64 f)
+{
+ return ((f >> 52) & 0x7FF) - 1023;
+}
+
uint32_t helper_compute_fprf(CPUPPCState *env, uint64_t arg, uint32_t set_fprf)
{
CPU_DoubleU farg;
@@ -993,6 +1003,42 @@ uint64_t helper_fsel(CPUPPCState *env, uint64_t arg1,
uint64_t arg2,
}
}
+uint32_t helper_ftdiv(uint64_t fra, uint64_t frb)
+{
+ int fe_flag = 0;
+ int fg_flag = 0;
+
+ if (unlikely(float64_is_infinity(fra) ||
+ float64_is_infinity(frb) ||
+ float64_is_zero(frb))) {
+ fe_flag = 1;
+ fg_flag = 1;
+ } else {
+ int e_a = ppc_float64_get_unbiased_exp(fra);
+ int e_b = ppc_float64_get_unbiased_exp(frb);
+
+ if (unlikely(float64_is_any_nan(fra) ||
+ float64_is_any_nan(frb))) {
+ fe_flag = 1;
+ } else if ((e_b <= -1022) || (e_b >= 1021)) {
+ fe_flag = 1;
+ } else if (!float64_is_zero(fra) &&
+ (((e_a - e_b) >= 1023) ||
+ ((e_a - e_b) <= -1021) ||
+ (e_a <= -970))) {
+ fe_flag = 1;
+ }
+
+ if (unlikely(float64_is_zero_or_denormal(frb))) {
+ /* XB is not zero because of the above check and */
+ /* so must be denormalized. */
+ fg_flag = 1;
+ }
+ }
+
+ return 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
+}
+
void helper_fcmpu(CPUPPCState *env, uint64_t arg1, uint64_t arg2,
uint32_t crfD)
{
@@ -2021,16 +2067,6 @@ VSX_RSQRTE(xsrsqrtesp, 1, float64, f64, 1, 1)
VSX_RSQRTE(xvrsqrtedp, 2, float64, f64, 0, 0)
VSX_RSQRTE(xvrsqrtesp, 4, float32, f32, 0, 0)
-static inline int ppc_float32_get_unbiased_exp(float32 f)
-{
- return ((f >> 23) & 0xFF) - 127;
-}
-
-static inline int ppc_float64_get_unbiased_exp(float64 f)
-{
- return ((f >> 52) & 0x7FF) - 1023;
-}
-
/* VSX_TDIV - VSX floating point test for divide
* op - instruction mnemonic
* nels - number of elements (1, 2 or 4)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index c7c915f..2fb337c 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -99,6 +99,8 @@ DEF_HELPER_2(fres, i64, env, i64)
DEF_HELPER_2(frsqrte, i64, env, i64)
DEF_HELPER_4(fsel, i64, env, i64, i64, i64)
+DEF_HELPER_FLAGS_2(ftdiv, TCG_CALL_NO_RWG_SE, i32, i64, i64)
+
#define dh_alias_avr ptr
#define dh_ctype_avr ppc_avr_t *
#define dh_is_signed_avr dh_is_signed_ptr
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 4c08fe5..f372742 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2238,6 +2238,18 @@ GEN_FLOAT_B(rip, 0x08, 0x0E, 1, PPC_FLOAT_EXT);
/* frim */
GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT);
+static void gen_ftdiv(DisasContext *ctx)
+{
+ if (unlikely(!ctx->fpu_enabled)) {
+ gen_exception(ctx, POWERPC_EXCP_FPU);
+ return;
+ }
+ gen_helper_ftdiv(cpu_crf[crfD(ctx->opcode)], cpu_fpr[rA(ctx->opcode)],
+ cpu_fpr[rB(ctx->opcode)]);
+}
+
+
+
/*** Floating-Point compare ***/
/* fcmpo */
@@ -9856,6 +9868,7 @@ GEN_FLOAT_ACB(madd, 0x1D, 1, PPC_FLOAT),
GEN_FLOAT_ACB(msub, 0x1C, 1, PPC_FLOAT),
GEN_FLOAT_ACB(nmadd, 0x1F, 1, PPC_FLOAT),
GEN_FLOAT_ACB(nmsub, 0x1E, 1, PPC_FLOAT),
+GEN_HANDLER_E(ftdiv, 0x3F, 0x00, 0x04, 1, PPC_NONE, PPC2_FP_TST_ISA206),
GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT),
GEN_HANDLER_E(fctiwu, 0x3F, 0x0E, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT),
--
1.8.1.4
- [Qemu-devel] [PULL 051/130] target-ppc: Scalar Non-Signalling Conversions, (continued)
- [Qemu-devel] [PULL 051/130] target-ppc: Scalar Non-Signalling Conversions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 071/130] virtex_ml507: Add support for loading initrd images, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 061/130] target-ppc: Add Flag for ISA V2.06 Floating Point Conversion, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 065/130] target-ppc: Add Flag for Power ISA V2.06 Floating Point Test Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 067/130] target-ppc: Add ISA 2.06 ftsqrt, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 070/130] PPC: KVM: store SLB slot number, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 064/130] target-ppc: Fix and enable fri[mnpz], Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 060/130] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 072/130] PPC: KVM: suppress warnings about not supported SPRs, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 077/130] spapr: print more detailed error message on failed load_elf(), Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 066/130] target-ppc: Add ISA 2.06 ftdiv Instruction,
Alexander Graf <=
- [Qemu-devel] [PULL 063/130] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 059/130] target-ppc: Add ISA2.06 lbarx, lharx Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 074/130] spapr: support only ELF kernel images, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 062/130] target-ppc: Add ISA2.06 Float to Integer Instructions, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 076/130] elf-loader: add more return codes, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 075/130] moxie: fix load_elf() usage, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 080/130] target-ppc: add extended opcodes for dcbt/dcbtst, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 081/130] target-ppc: Fix xxpermdi When T==A or T==B, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 083/130] target-ppc: Add Target Address SPR (TAR) to Power8, Alexander Graf, 2014/03/06
- [Qemu-devel] [PULL 078/130] target-ppc: Update external_htab even when HTAB is managed by kernel, Alexander Graf, 2014/03/06