Re: [Qemu-devel] [PATCH 1/7] allwinner-a10-pic: set vector address when an interrupt is pending

[Li Guang]

Hi,

Beniamino Galvani wrote:
> This patch implements proper updating of the vector register which
> should hold, according to the A10 user manual, the vector address for
> the interrupt currently active on the CPU IRQ input.
>
> Interrupt priority is not implemented at the moment and thus the first
> pending interrupt is returned.
>
> Signed-off-by: Beniamino Galvani<address@hidden>
> ---
>   hw/intc/allwinner-a10-pic.c |   11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c
> index 407d563..bb2351f 100644
> --- a/hw/intc/allwinner-a10-pic.c
> +++ b/hw/intc/allwinner-a10-pic.c
> @@ -23,11 +23,20 @@
>   static void aw_a10_pic_update(AwA10PICState *s)
>   {
>       uint8_t i;
> -    int irq = 0, fiq = 0;
> +    int irq = 0, fiq = 0, pending;
> +
> +    s->vector = 0;
>
>       for (i = 0; i<  AW_A10_PIC_REG_NUM; i++) {
>           irq |= s->irq_pending[i]&  ~s->mask[i];
>           fiq |= s->select[i]&  s->irq_pending[i]&  ~s->mask[i];
> +
> +        if (!s->vector) {
> +            pending = ffs(s->irq_pending[i]&  ~s->mask[i]);
> +            if (pending) {
> +                s->vector = (i * 32 + pending - 1) * 4;
>    

this maybe should determined also by interrupt priority,
and you should also remove s->vector assignment at register write phase.

Thanks!
> +            }
> +        }
>       }
>
>       qemu_set_irq(s->parent_irq, !!irq);
>