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[Qemu-devel] [PATCH 1/3] X86: Invalid lock prefix (F0)


From: Xabier Ugarte-Pedrero
Subject: [Qemu-devel] [PATCH 1/3] X86: Invalid lock prefix (F0)
Date: Tue, 11 Feb 2014 22:02:59 +0100

  If the lock prefix (F0) is prepended more than once to any instruction, then 
it should generate an invalid instruction exception (illegal_op).
  See Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A: 
Instruction Set Reference, A-M. Order Number: 253666-049US February 2014. See 
“LOCK—Assert LOCK# Signal Prefix” in Chapter 3.

  Signed-off-by: Xabier Ugarte-Pedrero <address@hidden>
---
 target-i386/translate.c |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index b0f2279..733e5b2 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -4415,6 +4415,12 @@ static target_ulong disas_insn(CPUX86State *env, 
DisasContext *s,
         prefixes |= PREFIX_REPNZ;
         goto next_byte;
     case 0xf0:
+        /*Invalid lock sequence*/
+        if (prefixes & PREFIX_LOCK){
+            /*Clear the PREFIX_LOCK FLAG*/
+            prefixes &= !PREFIX_LOCK;
+            goto illegal_op;
+        }
         prefixes |= PREFIX_LOCK;
         goto next_byte;
     case 0x2e:
-- 
1.7.9.5




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