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Re: [Qemu-devel] [Qemu-ppc] [PATCH V9 3/5] target-ppc: Fix page table lo


From: Greg Kurz
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH V9 3/5] target-ppc: Fix page table lookup with kvm enabled
Date: Mon, 10 Feb 2014 17:27:43 +0100

On Tue, 28 Jan 2014 13:30:01 +0530
"Aneesh Kumar K.V" <address@hidden> wrote:
> With kvm enabled, we store the hash page table information in the
> hypervisor. Use ioctl to read the htab contents. Without this we get the
> below error when trying to read the guest address
> 
>  (gdb) x/10 do_fork
>  0xc000000000098660 <do_fork>:   Cannot access memory at address
> 0xc000000000098660 (gdb)
> 
> Signed-off-by: Aneesh Kumar K.V <address@hidden>
> ---
>  hw/ppc/spapr.c          |  1 +
>  hw/ppc/spapr_hcall.c    | 50 +++++++++++++++++++------------
>  target-ppc/kvm.c        | 53 +++++++++++++++++++++++++++++++++
>  target-ppc/kvm_ppc.h    | 19 ++++++++++++
>  target-ppc/mmu-hash64.c | 78
> ++++++++++++++++++++++++++++++++++++++++--------- target-ppc/mmu-hash64.h
> | 19 ++++++++---- 6 files changed, 181 insertions(+), 39 deletions(-)
> 
> [... snip ...]
>
> diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
> index 55f5a230fd20..dc027f6d5264 100644
> --- a/target-ppc/mmu-hash64.h
> +++ b/target-ppc/mmu-hash64.h
> @@ -75,23 +75,30 @@ int ppc_hash64_handle_mmu_fault(CPUPPCState *env,
> target_ulong address, int rw, #define HPTE64_V_1TB_SEG
> 0x4000000000000000ULL #define HPTE64_V_VRMA_MASK
> 0x4001ffffff000000ULL
> 
> +
> +extern bool kvmppc_kern_htab;
> +uint64_t ppc_hash64_start_access(PowerPCCPU *cpu, target_ulong
> pte_index); +void ppc_hash64_stop_access(uint64_t token);
> +
>  static inline target_ulong ppc_hash64_load_hpte0(CPUPPCState *env,
> -                                                 hwaddr pte_offset)
> +                                                 uint64_t token, int
> index) {
> +    index *= HASH_PTE_SIZE_64;
>      if (env->external_htab) {
> -        return  ldq_p(env->external_htab + pte_offset);
> +        return  ldq_p((const void *)(token + index));

This does not compile on 32 bit:

target-ppc/mmu-hash64.h: In function ‘ppc_hash64_load_hpte0’:
target-ppc/mmu-hash64.h:90:23: error: cast to pointer from integer of 
different size 

>      } else {
> -        return ldq_phys(env->htab_base + pte_offset);
> +        return ldq_phys(token + index);
>      }
>  }
> 
>  static inline target_ulong ppc_hash64_load_hpte1(CPUPPCState *env,
> -                                                 hwaddr pte_offset)
> +                                                 uint64_t token, int
> index) {
> +    index *= HASH_PTE_SIZE_64;
>      if (env->external_htab) {
> -        return ldq_p(env->external_htab + pte_offset +
> HASH_PTE_SIZE_64/2);
> +        return  ldq_p((const void *)(token + index +

Same error:

target-ppc/mmu-hash64.h: In function ‘ppc_hash64_load_hpte1’:
target-ppc/mmu-hash64.h:101:23: error: cast to pointer from integer of 
different size

> HASH_PTE_SIZE_64/2)); } else {
> -        return ldq_phys(env->htab_base + pte_offset +
> HASH_PTE_SIZE_64/2);
> +        return ldq_phys(token + index + HASH_PTE_SIZE_64/2);
>      }
>  }
> 


                           ^

-- 
Gregory Kurz                                     address@hidden
                                                 address@hidden
Software Engineer @ IBM/Meiosys                  http://www.ibm.com
Tel +33 (0)562 165 496

"Anarchy is about taking complete responsibility for yourself."
        Alan Moore.




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