Re: [Qemu-devel] [PATCH v2 35/35] target-arm: Implement AArch64 OSLAR_EL1 sysreg as WI

[Peter Crosthwaite]

On Sat, Feb 1, 2014 at 1:45 AM, Peter Maydell <address@hidden> wrote:
> Define a dummy version of the AArch64 OSLAR_EL1 system register
> which just ignores writes. Linux will always write to this (it
> is the OS lock used for debugging), but we don't support debug.
>
> Signed-off-by: Peter Maydell <address@hidden>

Reviewed-by: Peter Crosthwaite <address@hidden>

> ---
>  target-arm/helper.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 1621030..43a4f31 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1764,6 +1764,10 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
>      { .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
>        .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
>        .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
> +    /* We define a dummy WI OSLAR_EL1, because Linux writes to it. */
> +    { .name = "OSLAR_EL1", .state = ARM_CP_STATE_AA64,
> +      .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
> +      .access = PL1_W, .type = ARM_CP_NOP },
>      REGINFO_SENTINEL
>  };
>
> --
> 1.8.5
>
>