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Re: [Qemu-devel] [PATCH v2 25/35] target-arm: Implement AArch64 dummy MD
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [PATCH v2 25/35] target-arm: Implement AArch64 dummy MDSCR_EL1 |
Date: |
Sun, 9 Feb 2014 12:27:19 +1000 |
On Sat, Feb 1, 2014 at 1:45 AM, Peter Maydell <address@hidden> wrote:
> We don't support letting the guest do debug, but Linux prods the
> monitor debug system control register anyway, so implement a dummy
> RAZ/WI version.
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
> ---
> target-arm/helper.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 0dcb5b1..b0d28ca 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1681,6 +1681,12 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
> .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 7,
> .access = PL1_W, .type = ARM_CP_NO_MIGRATE,
> .writefn = tlbi_aa64_vaa_write },
> + /* Dummy implementation of monitor debug system control register:
> + * we don't support debug.
> + */
> + { .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
> + .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
> + .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
> REGINFO_SENTINEL
> };
>
> --
> 1.8.5
>
>
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Peter Crosthwaite <=