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[Qemu-devel] [PATCH v2 05/35] target-arm: Remove unused ARMCPUState sr s
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 05/35] target-arm: Remove unused ARMCPUState sr substruct |
Date: |
Fri, 31 Jan 2014 15:45:13 +0000 |
Remove the 'struct sr' from ARMCPUState -- it isn't actually used and is
a hangover from the original separate system register implementation used
by the SuSE linux-user-mode-only AArch64 target.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu.h | 5 -----
1 file changed, 5 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 4bad6c0..70cd5a0 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -217,11 +217,6 @@ typedef struct CPUARMState {
uint32_t c15_power_control; /* power control */
} cp15;
- /* System registers (AArch64) */
- struct {
- uint64_t tpidr_el0;
- } sr;
-
struct {
uint32_t other_sp;
uint32_t vecbase;
--
1.8.5
- [Qemu-devel] [PATCH v2 00/35] AArch64 system mode: system register rework, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 07/35] target-arm: Add exception level to the AArch64 TB flags, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 10/35] target-arm: Stop underdecoding ARM946 PRBS registers, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 03/35] target-arm: Define names for SCTLR bits, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 23/35] target-arm: Implement AArch64 cache invalidate/clean ops, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 21/35] target-arm: Implement AArch64 MIDR_EL1, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 25/35] target-arm: Implement AArch64 dummy MDSCR_EL1, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 24/35] target-arm: Implement AArch64 TLB invalidate ops, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 05/35] target-arm: Remove unused ARMCPUState sr substruct,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 14/35] target-arm: Convert miscellaneous reginfo structs to accessfn, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 31/35] target-arm: Implement AArch64 MPIDR, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 27/35] target-arm: Implement AArch64 SCTLR_EL1, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 12/35] target-arm: Convert performance monitor reginfo to accesfn, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 33/35] target-arm: Implement AArch64 ID and feature registers, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 13/35] target-arm: Convert generic timer reginfo to accessfn, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 16/35] target-arm: Remove unnecessary code now read/write fns can't fail, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 20/35] target-arm: Implement AArch64 CurrentEL sysreg, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 06/35] target-arm: Log bad system register accesses with LOG_UNIMP, Peter Maydell, 2014/01/31
- [Qemu-devel] [PATCH v2 29/35] target-arm: Implement AArch64 VBAR_EL1, Peter Maydell, 2014/01/31