[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 4/5] kvm: make hyperv vapic assist page migratable
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PATCH 4/5] kvm: make hyperv vapic assist page migratable |
Date: |
Fri, 24 Jan 2014 17:17:55 +0100 |
From: Vadim Rozenfeld <address@hidden>
Signed-off-by: Vadim Rozenfeld <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target-i386/cpu.h | 1 +
target-i386/kvm.c | 16 +++++++++++++---
target-i386/machine.c | 22 ++++++++++++++++++++++
3 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 3dba5ef..45bd554 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -864,6 +864,7 @@ typedef struct CPUX86State {
uint64_t msr_gp_evtsel[MAX_GP_COUNTERS];
uint64_t msr_hv_hypercall;
uint64_t msr_hv_guest_os_id;
+ uint64_t msr_hv_vapic;
/* exception/interrupt handling */
int error_code;
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 8f2854a..ddd437f 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -73,6 +73,7 @@ static bool has_msr_bndcfgs;
static bool has_msr_kvm_steal_time;
static int lm_capable_kernel;
static bool has_msr_hv_hypercall;
+static bool has_msr_hv_vapic;
static bool has_msr_architectural_pmu;
static uint32_t num_architectural_pmu_counters;
@@ -496,6 +497,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->hyperv_vapic) {
c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
+ has_msr_hv_vapic = true;
}
c = &cpuid_data.entries[cpuid_i++];
@@ -503,7 +505,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
if (cpu->hyperv_relaxed_timing) {
c->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
}
- if (cpu->hyperv_vapic) {
+ if (has_msr_hv_vapic) {
c->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
}
c->ebx = cpu->hyperv_spinlock_attempts;
@@ -1233,8 +1235,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL,
env->msr_hv_hypercall);
}
- if (cpu->hyperv_vapic) {
- kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE, 0);
+ if (has_msr_hv_vapic) {
+ kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
+ env->msr_hv_vapic);
}
/* Note: MSR_IA32_FEATURE_CONTROL is written separately, see
@@ -1524,6 +1527,10 @@ static int kvm_get_msrs(X86CPU *cpu)
msrs[n++].index = HV_X64_MSR_HYPERCALL;
msrs[n++].index = HV_X64_MSR_GUEST_OS_ID;
}
+ if (has_msr_hv_vapic) {
+ msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
+ }
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
if (ret < 0) {
@@ -1637,6 +1644,9 @@ static int kvm_get_msrs(X86CPU *cpu)
case HV_X64_MSR_GUEST_OS_ID:
env->msr_hv_guest_os_id = msrs[i].data;
break;
+ case HV_X64_MSR_APIC_ASSIST_PAGE:
+ env->msr_hv_vapic = msrs[i].data;
+ break;
}
}
diff --git a/target-i386/machine.c b/target-i386/machine.c
index 96fd045..e72e270 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -574,6 +574,25 @@ static const VMStateDescription
vmstate_msr_hypercall_hypercall = {
}
};
+static bool hyperv_vapic_enable_needed(void *opaque)
+{
+ X86CPU *cpu = opaque;
+ CPUX86State *env = &cpu->env;
+
+ return env->msr_hv_vapic != 0;
+}
+
+static const VMStateDescription vmstate_msr_hyperv_vapic = {
+ .name = "cpu/msr_hyperv_vapic",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT64(env.msr_hv_vapic, X86CPU),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
const VMStateDescription vmstate_x86_cpu = {
.name = "cpu",
.version_id = 12,
@@ -711,6 +730,9 @@ const VMStateDescription vmstate_x86_cpu = {
}, {
.vmsd = &vmstate_msr_hypercall_hypercall,
.needed = hyperv_hypercall_enable_needed,
+ }, {
+ .vmsd = &vmstate_msr_hyperv_vapic,
+ .needed = hyperv_vapic_enable_needed,
} , {
/* empty */
}
--
1.8.3.1