[Qemu-devel] [PATCH v3] target-ppc: gdbstub allow byte swapping for, reading/writing registers

[Thomas Falcon]

This patch allows registers to be properly read from and written to
when using the gdbstub to debug a ppc guest running in little
endian mode.  It accomplishes this goal by byte swapping the values of
any registers if the MSR:LE value is set.

Signed-off-by: Thomas Falcon <address@hidden>
---
Differences from v2:

Fixed formatting issues
Added logic to ensure only FP registers have a guaranteed size of 8 bytes

---
 target-ppc/cpu-qom.h        |  2 ++
 target-ppc/gdbstub.c        | 45 
+++++++++++++++++++++++++++++++++++++++++++++
 target-ppc/translate_init.c |  4 ++--
 3 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 72b2232..992963f 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -109,7 +109,9 @@ void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
                              fprintf_function cpu_fprintf, int flags);
 hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register_wrap(CPUState *cpu, uint8_t *buf, int reg);
 int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register_wrap(CPUState *cpu, uint8_t *buf, int reg);
 int ppc64_cpu_write_elf64_qemunote(WriteCoreDumpFunction f,
                                    CPUState *cpu, void *opaque);
 int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 1c91090..cc4eac5 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -21,6 +21,51 @@
 #include "qemu-common.h"
 #include "exec/gdbstub.h"

+/* The following functions are used to ensure the correct
+ * transfer of registers between a little endian ppc target
+ * and a big endian host by checking the LE bit in the Machine State 
Register
+ */
+
+int ppc_cpu_gdb_read_register_wrap(CPUState *cs, uint8_t *mem_buf, int n)
+{
+    PowerPCCPU *cpu = POWERPC_CPU(cs);
+    CPUPPCState *env = &cpu->env;
+
+    int len = ppc_cpu_gdb_read_register(cs, mem_buf, n), i;
+    if (msr_le) {
+        uint8_t tmp;
+        for (i = 0; i < len/2 ; i++) {
+            tmp = *(mem_buf + i);
+            *(mem_buf + i) = *(mem_buf + len - 1 - i);
+            *(mem_buf + len - 1 - i) = tmp;
+        }
+    }
+    return len;
+}
+
+int ppc_cpu_gdb_write_register_wrap(CPUState *cs, uint8_t *mem_buf, int n)
+{
+    PowerPCCPU *cpu = POWERPC_CPU(cs);
+    CPUPPCState *env = &cpu->env;
+    if (msr_le) {
+        int len = 0, i = 0;
+        if (n > 31 && n < 64) {
+            len = 8;
+        } else if (n == 66) {
+            len = 4;
+        } else {
+            len = sizeof(target_ulong);
+        }
+        uint8_t tmp;
+        for (i = 0; i < len/2; i++) {
+            tmp = *(mem_buf + i);
+            *(mem_buf+i) = *(mem_buf + len - 1 - i);
+            *(mem_buf + len - 1 - i) = tmp;
+        }
+    }
+    return ppc_cpu_gdb_write_register(cs, mem_buf, n);
+}
+
 /* Old gdb always expects FP registers.  Newer (xml-aware) gdb only
  * expects whatever the target description contains.  Due to a
  * historical mishap the FP registers appear in between core integer
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index c030a20..41ea4b7 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8655,8 +8655,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, 
void *data)
     cc->dump_state = ppc_cpu_dump_state;
     cc->dump_statistics = ppc_cpu_dump_statistics;
     cc->set_pc = ppc_cpu_set_pc;
-    cc->gdb_read_register = ppc_cpu_gdb_read_register;
-    cc->gdb_write_register = ppc_cpu_gdb_write_register;
+    cc->gdb_read_register = ppc_cpu_gdb_read_register_wrap;
+    cc->gdb_write_register = ppc_cpu_gdb_write_register_wrap;
 #ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = ppc_cpu_get_phys_page_debug;
     cc->vmsd = &vmstate_ppc_cpu;
--
1.8.3.1