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[Qemu-devel] [PATCH v2 08/10] target-arm: A64: Add support for floating
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 08/10] target-arm: A64: Add support for floating point conditional compare |
Date: |
Mon, 30 Dec 2013 16:34:33 +0000 |
From: Claudio Fontana <address@hidden>
This adds decoding support for C3.6.23 FP Conditional Compare.
Signed-off-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-arm/translate-a64.c | 35 ++++++++++++++++++++++++++++++++++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index dc9cc14..44d8a09 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -3268,7 +3268,40 @@ static void disas_fp_compare(DisasContext *s, uint32_t
insn)
*/
static void disas_fp_ccomp(DisasContext *s, uint32_t insn)
{
- unsupported_encoding(s, insn);
+ unsigned int mos, type, rm, cond, rn, op, nzcv;
+ TCGv_i64 tcg_flags;
+ int label_continue = -1;
+
+ mos = extract32(insn, 29, 3);
+ type = extract32(insn, 22, 2); /* 0 = single, 1 = double */
+ rm = extract32(insn, 16, 5);
+ cond = extract32(insn, 12, 4);
+ rn = extract32(insn, 5, 5);
+ op = extract32(insn, 4, 1);
+ nzcv = extract32(insn, 0, 4);
+
+ if (mos || type > 1) {
+ unallocated_encoding(s);
+ return;
+ }
+
+ if (cond < 0x0e) { /* not always */
+ int label_match = gen_new_label();
+ label_continue = gen_new_label();
+ arm_gen_test_cc(cond, label_match);
+ /* nomatch: */
+ tcg_flags = tcg_const_i64(nzcv << 28);
+ gen_set_nzcv(tcg_flags);
+ tcg_temp_free_i64(tcg_flags);
+ tcg_gen_br(label_continue);
+ gen_set_label(label_match);
+ }
+
+ handle_fp_compare(s, type, rn, rm, false, op);
+
+ if (cond < 0x0e) {
+ gen_set_label(label_continue);
+ }
}
/* C3.6.24 Floating point conditional select
--
1.8.5
- [Qemu-devel] [PATCH v2 00/10] A64 decoder patchset 5: most floating point, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 10/10] target-arm: Give the FPSCR rounding modes names, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 06/10] target-arm: A64: Add fmov (scalar, immediate) instruction, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 08/10] target-arm: A64: Add support for floating point conditional compare,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 01/10] target-arm: A64: Add support for dumping AArch64 VFP register state, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 02/10] target-arm: A64: Fix vector register access on bigendian hosts, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 04/10] target-arm: A64: Add "Floating-point data-processing (2 source)" insns, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 07/10] target-arm: A64: Add support for floating point compare, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 09/10] target-arm: A64: Add support for floating point cond select, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 03/10] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum, Peter Maydell, 2013/12/30
- [Qemu-devel] [PATCH v2 05/10] target-arm: A64: Add "Floating-point data-processing (3 source)" insns, Peter Maydell, 2013/12/30