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[Qemu-devel] [PATCH v2 24/25] .travis.yml: Add aarch64-* targets
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v2 24/25] .travis.yml: Add aarch64-* targets |
Date: |
Sun, 22 Dec 2013 22:50:06 +0000 |
From: Alex Bennée <address@hidden>
Now the AArch64 targets are in mainline we can include them in our
Travis test matrix.
Signed-off-by: Alex Bennée <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index 90f1676..c7ff4da 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -16,6 +16,7 @@ env:
matrix:
- TARGETS=alpha-softmmu,alpha-linux-user
- TARGETS=arm-softmmu,arm-linux-user
+ - TARGETS=aarch64-softmmu,aarch64-linux-user
- TARGETS=cris-softmmu
- TARGETS=i386-softmmu,x86_64-softmmu
- TARGETS=lm32-softmmu
--
1.8.5
- [Qemu-devel] [PATCH v2 04/25] target-arm: A64: add support for ld/st with index, (continued)
- [Qemu-devel] [PATCH v2 04/25] target-arm: A64: add support for ld/st with index, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 18/25] target-arm: A64: add support for conditional compare insns, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 09/25] target-arm: A64: Add decoder skeleton for FP instructions, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 22/25] linux-user: AArch64: define TARGET_CLONE_BACKWARDS, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 08/25] target-arm: A64: implement SVC, BRK, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 12/25] target-arm: Update generic cpreg code for AArch64, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 14/25] target-arm: A64: Implement MRS/MSR/SYS/SYSL, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 05/25] target-arm: A64: add support for add, addi, sub, subi, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 02/25] target-arm: A64: add support for ld/st unsigned imm, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 24/25] .travis.yml: Add aarch64-* targets,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 15/25] target-arm: A64: Implement minimal set of EL0-visible sysregs, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 01/25] target-arm: A64: add support for ld/st pair, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 06/25] target-arm: A64: add support for move wide instructions, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 20/25] target-arm: Widen exclusive-access support struct fields to 64 bits, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 16/25] target-arm: Widen thread-local register state fields to 64 bits, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 03/25] target-arm: A64: add support for ld/st with reg offset, Peter Maydell, 2013/12/22
- [Qemu-devel] [PATCH v2 07/25] target-arm: A64: add support for 3 src data proc insns, Peter Maydell, 2013/12/22