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Re: [Qemu-devel] [PATCH 02/13] target-arm: A64: add support for logical
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 02/13] target-arm: A64: add support for logical (shifted register) |
Date: |
Sat, 07 Dec 2013 05:49:14 +1300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 12/06/2013 10:36 PM, Alex Bennée wrote:
>> While correct, surely better to work with tcg and select on opc:invert to
>> generate andc/orc/eqv?
>
> Shouldn't the TCG optimiser/back-end just be smart enough to figure it
> out? It seems clearer to express the tcg ops in terms of the front-end's
> meaning?
No, the TCG optimizer is really quite stupid. It only does constant folding
and dead code elimination. No peepholing or combination sorts of opts.
>> Also, isn't MOV (register) canonical for ORR (rn=31 && shift_amount=0), and
>> MVN
>> (register) canonical for ORN (rn=31 && shift_amount=0), and both therefore
>> also
>> worth a special case?
>
> I suspect I'm being overly cheeky to expect the optimiser to detect and
> optimise for that case as the ZR is a const ;-)
It would. But since register-register move is a rather common operation, it
will pay off to not require the optimizer to clean up that special case.
Thus I only recommend special casing the official aliases, not any operation
that could mathematically be considered an identity.
r~