[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition
From: |
Qiaowei Ren |
Subject: |
[Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition |
Date: |
Sat, 7 Dec 2013 02:52:56 +0800 |
Signed-off-by: Qiaowei Ren <address@hidden>
Signed-off-by: Xudong Hao <address@hidden>
Signed-off-by: Liu Jinsong <address@hidden>
---
arch/x86/include/asm/processor.h | 23 +++++++++++++++++++++++
arch/x86/include/asm/xsave.h | 6 +++++-
2 files changed, 28 insertions(+), 1 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 987c75e..43be6f6 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -370,6 +370,26 @@ struct ymmh_struct {
u32 ymmh_space[64];
};
+struct lwp_struct {
+ u64 lwpcb_addr;
+ u32 flags;
+ u32 buf_head_offset;
+ u64 buf_base;
+ u32 buf_size;
+ u32 filters;
+ u64 saved_event_record[4];
+ u32 event_counter[16];
+};
+
+struct bndregs_struct {
+ u64 bndregs[8];
+} __packed;
+
+struct bndcsr_struct {
+ u64 cfg_reg_u;
+ u64 status_reg;
+} __packed;
+
struct xsave_hdr_struct {
u64 xstate_bv;
u64 reserved1[2];
@@ -380,6 +400,9 @@ struct xsave_struct {
struct i387_fxsave_struct i387;
struct xsave_hdr_struct xsave_hdr;
struct ymmh_struct ymmh;
+ struct lwp_struct lwp;
+ struct bndregs_struct bndregs;
+ struct bndcsr_struct bndcsr;
/* new processor state extensions will go here */
} __attribute__ ((packed, aligned (64)));
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h
index 0415cda..5cd9de3 100644
--- a/arch/x86/include/asm/xsave.h
+++ b/arch/x86/include/asm/xsave.h
@@ -9,6 +9,8 @@
#define XSTATE_FP 0x1
#define XSTATE_SSE 0x2
#define XSTATE_YMM 0x4
+#define XSTATE_BNDREGS 0x8
+#define XSTATE_BNDCSR 0x10
#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
@@ -20,10 +22,12 @@
#define XSAVE_YMM_SIZE 256
#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
+#define XSTATE_FLEXIBLE (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
+#define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR)
/*
* These are the features that the OS can handle currently.
*/
-#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM)
+#define XCNTXT_MASK (XSTATE_FLEXIBLE | XSTATE_EAGER)
#ifdef CONFIG_X86_64
#define REX_PREFIX "0x48, "
--
1.7.1
- [Qemu-devel] [PATCH 1/3] x86, mpx: add documentation on Intel MPX, Qiaowei Ren, 2013/12/06
- [Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition,
Qiaowei Ren <=
- Re: [Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition, Borislav Petkov, 2013/12/06
- Re: [Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition, Ren, Qiaowei, 2013/12/06
- Re: [Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition, H. Peter Anvin, 2013/12/06
- Re: [Qemu-devel] [PATCH 3/3] X86, mpx: Intel MPX xstate feature definition, Borislav Petkov, 2013/12/06
[Qemu-devel] [PATCH 2/3] X86, mpx: Intel MPX definition, Qiaowei Ren, 2013/12/06