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[Qemu-devel] [PATCH v3 05/12] target-arm: A64: add stubs for a64 specifi
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v3 05/12] target-arm: A64: add stubs for a64 specific helpers |
Date: |
Thu, 5 Dec 2013 12:39:33 +0000 |
From: Alexander Graf <address@hidden>
We will need helpers that only make sense with AArch64. Add
helper-a64.{c,h} files as stubs that we can fill with these
helpers in the following patches.
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-arm/Makefile.objs | 2 +-
target-arm/helper-a64.c | 25 +++++++++++++++++++++++++
target-arm/helper-a64.h | 18 ++++++++++++++++++
target-arm/helper.h | 4 ++++
4 files changed, 48 insertions(+), 1 deletion(-)
create mode 100644 target-arm/helper-a64.c
create mode 100644 target-arm/helper-a64.h
diff --git a/target-arm/Makefile.objs b/target-arm/Makefile.objs
index 5493a4c..a5914e9 100644
--- a/target-arm/Makefile.objs
+++ b/target-arm/Makefile.objs
@@ -5,6 +5,6 @@ obj-$(call lnot,$(CONFIG_KVM)) += kvm-stub.o
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += neon_helper.o iwmmxt_helper.o
obj-y += gdbstub.o
-obj-$(TARGET_AARCH64) += cpu64.o translate-a64.o gdbstub64.o
+obj-$(TARGET_AARCH64) += cpu64.o translate-a64.o helper-a64.o gdbstub64.o
obj-$(call land,$(CONFIG_KVM),$(call lnot,$(TARGET_AARCH64))) += kvm32.o
obj-$(call land,$(CONFIG_KVM),$(TARGET_AARCH64)) += kvm64.o
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
new file mode 100644
index 0000000..adb8428
--- /dev/null
+++ b/target-arm/helper-a64.c
@@ -0,0 +1,25 @@
+/*
+ * AArch64 specific helpers
+ *
+ * Copyright (c) 2013 Alexander Graf <address@hidden>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "cpu.h"
+#include "exec/gdbstub.h"
+#include "helper.h"
+#include "qemu/host-utils.h"
+#include "sysemu/sysemu.h"
+#include "qemu/bitops.h"
diff --git a/target-arm/helper-a64.h b/target-arm/helper-a64.h
new file mode 100644
index 0000000..dd28306
--- /dev/null
+++ b/target-arm/helper-a64.h
@@ -0,0 +1,18 @@
+/*
+ * AArch64 specific helper definitions
+ *
+ * Copyright (c) 2013 Alexander Graf <address@hidden>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
diff --git a/target-arm/helper.h b/target-arm/helper.h
index cac9564..f3727a5 100644
--- a/target-arm/helper.h
+++ b/target-arm/helper.h
@@ -458,4 +458,8 @@ DEF_HELPER_3(neon_qzip8, void, env, i32, i32)
DEF_HELPER_3(neon_qzip16, void, env, i32, i32)
DEF_HELPER_3(neon_qzip32, void, env, i32, i32)
+#ifdef TARGET_AARCH64
+#include "helper-a64.h"
+#endif
+
#include "exec/def-helper.h"
--
1.7.9.5
- [Qemu-devel] [PATCH v3 09/12] target-arm: A64: add support for BR, BLR and RET insns, (continued)
- [Qemu-devel] [PATCH v3 09/12] target-arm: A64: add support for BR, BLR and RET insns, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 10/12] target-arm: A64: add support for conditional branches, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 02/12] target-arm: A64: add set_pc cpu method, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 06/12] target-arm: A64: provide skeleton for a64 insn decoding, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 03/12] target-arm: A64: provide functions for accessing FPCR and FPSR, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 07/12] target-arm: A64: expand decoding skeleton for system instructions, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 01/12] target-arm: Split A64 from A32/T32 gen_intermediate_code_internal(), Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 04/12] target-arm: Support fp registers in gdb stub, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 05/12] target-arm: A64: add stubs for a64 specific helpers,
Peter Maydell <=
- [Qemu-devel] [PATCH v3 11/12] target-arm: A64: add support for 'test and branch' imm, Peter Maydell, 2013/12/05
- [Qemu-devel] [PATCH v3 08/12] target-arm: A64: add support for B and BL insns, Peter Maydell, 2013/12/05
- Re: [Qemu-devel] [PATCH v3 00/12] target-arm: A64 decoder, foundation plus branches, Peter Maydell, 2013/12/17