qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 4/4] KVM/X86: Intel MPX vmx and msr handle


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH 4/4] KVM/X86: Intel MPX vmx and msr handle
Date: Fri, 29 Nov 2013 16:07:56 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130923 Thunderbird/17.0.9

Il 29/11/2013 14:44, Liu, Jinsong ha scritto:
> From 7532bdffe9f74db65f6eff733cb227a66bef932e Mon Sep 17 00:00:00 2001
> From: Liu Jinsong <address@hidden>
> Date: Sat, 30 Nov 2013 00:27:02 +0800
> Subject: [PATCH 4/4] KVM/X86: Intel MPX vmx and msr handle
> 
> Signed-off-by: Xudong Hao <address@hidden>
> Reviewed-by: Liu Jinsong <address@hidden>

This should be a Signed-off-by since you are posting the patch, not
Xudong Hao (same for patches 1 and 3).

I think this patch should go before the previous one.

Also see below.

> +     if (cpu_has_mpx)
> +             rdmsrl(MSR_IA32_BNDCFGS, vmx->host_state.msr_host_bndcfgs);
>       for (i = 0; i < vmx->save_nmsrs; ++i)
>               kvm_set_shared_msr(vmx->guest_msrs[i].index,
>                                  vmx->guest_msrs[i].data,
> @@ -1684,6 +1687,8 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx)
>  #ifdef CONFIG_X86_64
>       wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
>  #endif
> +     if (cpu_has_mpx)
> +             wrmsrl(MSR_IA32_BNDCFGS, vmx->host_state.msr_host_bndcfgs);

This should be "if (vmx->host_state.msr_host_bndcfgs)", so that no WRMSR
is done if host_bndcfgs == 0 (which includes the case of !cpu_has_mpx).

> @@ -2800,7 +2805,7 @@ static __init int setup_vmcs_config(struct vmcs_config 
> *vmcs_conf)
>       min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
>  #endif
>       opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT |
> -             VM_EXIT_ACK_INTR_ON_EXIT;
> +             VM_EXIT_ACK_INTR_ON_EXIT | VM_EXIT_CLEAR_BNDCFGS;
> -     opt = VM_ENTRY_LOAD_IA32_PAT;
> +     opt = VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_LOAD_BNDCFGS;
>       if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
>                               &_vmentry_control) < 0)
>               return -EIO;
> @@ -8636,6 +8641,10 @@ static int __init vmx_init(void)
>       vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
>       vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
>       vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
> +     if ((vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS) &&
> +             (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS))
> +             vmx_disable_intercept_for_msr(MSR_IA32_BNDCFGS, true);

Why only disable it in that case?  If the two bits are guaranteed to be present
for "if (cpu_has_mpx)", please use "if (cpu_has_mpx)" here or perhaps make it
unconditional.  If the two bits might not be there, you need to emulate them
using add_atomic_switch_msr.

Thanks,

Paolo

>       memcpy(vmx_msr_bitmap_legacy_x2apic,
>                       vmx_msr_bitmap_legacy, PAGE_SIZE);
>       memcpy(vmx_msr_bitmap_longmode_x2apic,
> 




reply via email to

[Prev in Thread] Current Thread [Next in Thread]