Re: [Qemu-devel] [PATCH] piix: fix 32bit pci hole

[Laszlo Ersek]

On 11/26/13 17:16, Gerd Hoffmann wrote:
> Make the 32bit pci hole start at end of ram, so all possible address
> space is covered.  Of course the firmware can use less than that.
> Leaving space unused is no problem, mapping pci bars outside the
> hole causes problems though.
> 
> Signed-off-by: Gerd Hoffmann <address@hidden>
> ---
>  hw/pci-host/piix.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)
> 
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index edc974e..1414a2b 100644
> --- a/hw/pci-host/piix.c
> +++ b/hw/pci-host/piix.c
> @@ -345,15 +345,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
>      f->ram_memory = ram_memory;
>  
>      i440fx = I440FX_PCI_HOST_BRIDGE(dev);
> -    /* Set PCI window size the way seabios has always done it. */
> -    /* Power of 2 so bios can cover it with a single MTRR */
> -    if (ram_size <= 0x80000000) {
> -        i440fx->pci_info.w32.begin = 0x80000000;
> -    } else if (ram_size <= 0xc0000000) {
> -        i440fx->pci_info.w32.begin = 0xc0000000;
> -    } else {
> -        i440fx->pci_info.w32.begin = 0xe0000000;
> -    }
> +    i440fx->pci_info.w32.begin = ram_size;
>  
>      memory_region_init_alias(&f->pci_hole, OBJECT(d), "pci-hole", 
> f->pci_address_space,
>                               pci_hole_start, pci_hole_size);
> 

You've convinced me in the other thread that we can lower w32.begin as
far as we want, as long as it doesn't end up below the top of RAM.

But this patch also obliterates the high bound, 0xe0000000, which can
lead to:
- w32.end - w32.begin <= 512M, or
- a special case of the former, w32.end < w32.begin.

w32.end is set to IO_APIC_DEFAULT_ADDRESS==0xfec00000. (Which is BTW
fine for OVMF too.) What will happen in a 6G guest, for example?

Thanks,
Laszlo