+ sunxi_pic_update(s);
+}
+
+static uint64_t sunxi_pic_read(void *opaque, hwaddr offset, unsigned size)
+{
+ SunxiPICState *s = opaque;
+ uint8_t index = (offset& 0xc)/4;
+
+ switch (offset) {
+ case SUNXI_PIC_VECTOR:
+ return s->vector;
+ break;
+ case SUNXI_PIC_BASE_ADDR:
+ return s->base_addr;
+ break;
+ case SUNXI_PIC_PROTECT:
+ return s->protect;
+ break;
+ case SUNXI_PIC_NMI:
+ return s->nmi;
+ break;
+ case SUNXI_PIC_IRQ_PENDING ... SUNXI_PIC_IRQ_PENDING + 8:
+ return s->irq_pending[index];
+ break;
+ case SUNXI_PIC_FIQ_PENDING ... SUNXI_PIC_FIQ_PENDING + 8:
+ return s->fiq_pending[index];
+ break;
+ case SUNXI_PIC_SELECT ... SUNXI_PIC_SELECT + 8:
+ return s->select[index];
+ break;
+ case SUNXI_PIC_ENABLE ... SUNXI_PIC_ENABLE + 8:
+ return s->enable[index];
+ break;
+ case SUNXI_PIC_MASK ... SUNXI_PIC_MASK + 8:
+ return s->mask[index];
+ break;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static void sunxi_pic_write(void *opaque, hwaddr offset, uint64_t value,
+ unsigned size)
+{
+ SunxiPICState *s = opaque;
+ uint8_t index = (offset& 0xc)/4;
+
+ switch (offset) {
+ case SUNXI_PIC_VECTOR:
+ s->vector = value& ~0x3;
+ break;
+ case SUNXI_PIC_BASE_ADDR:
+ s->base_addr = value& ~0x3;
+ case SUNXI_PIC_PROTECT:
+ s->protect = value;
+ break;
+ case SUNXI_PIC_NMI:
+ s->nmi = value;
+ break;
+ case SUNXI_PIC_IRQ_PENDING ... SUNXI_PIC_IRQ_PENDING + 8:
+ s->irq_pending[index]&= ~value;
+ break;
+ case SUNXI_PIC_FIQ_PENDING ... SUNXI_PIC_FIQ_PENDING + 8:
+ s->fiq_pending[index]&= ~value;
+ break;
+ case SUNXI_PIC_SELECT ... SUNXI_PIC_SELECT + 8:
+ s->select[index] = value;
+ break;
+ case SUNXI_PIC_ENABLE ... SUNXI_PIC_ENABLE + 8:
+ s->enable[index] = value;
+ break;
+ case SUNXI_PIC_MASK ... SUNXI_PIC_MASK + 8:
+ s->mask[index] = value;
+ break;
+ default:
+ break;
+ }
+
+ sunxi_pic_update(s);
+}
+
+static const MemoryRegionOps sunxi_pic_ops = {
+ .read = sunxi_pic_read,
+ .write = sunxi_pic_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
+static const VMStateDescription vmstate_sunxi_pic = {
+ .name = "sunxi.pic",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(vector, SunxiPICState),
+ VMSTATE_UINT32(base_addr, SunxiPICState),
+ VMSTATE_UINT32(protect, SunxiPICState),
+ VMSTATE_UINT32(nmi, SunxiPICState),
+ VMSTATE_UINT32_ARRAY(irq_pending, SunxiPICState, SUNXI_PIC_REG_IDX),
+ VMSTATE_UINT32_ARRAY(fiq_pending, SunxiPICState, SUNXI_PIC_REG_IDX),
+ VMSTATE_UINT32_ARRAY(enable, SunxiPICState, SUNXI_PIC_REG_IDX),
+ VMSTATE_UINT32_ARRAY(select, SunxiPICState, SUNXI_PIC_REG_IDX),
+ VMSTATE_UINT32_ARRAY(mask, SunxiPICState, SUNXI_PIC_REG_IDX),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void sunxi_pic_realize(DeviceState *ds, Error **errp)
+{
+ SunxiPICState *s = SUNXI_PIC(ds);
+ SysBusDevice *dev = SYS_BUS_DEVICE(ds);
+
+ qdev_init_gpio_in(DEVICE(dev), sunxi_pic_set_irq, SUNXI_PIC_INT_NR);
+ sysbus_init_irq(dev,&s->parent_irq);
+ sysbus_init_irq(dev,&s->parent_fiq);
+ memory_region_init_io(&s->iomem, OBJECT(s),&sunxi_pic_ops, s,
+ "sunxi-pic", 0x400);
+ sysbus_init_mmio(dev,&s->iomem);
+}
+
+static void sunxi_pic_reset(DeviceState *d)
+{
+ SunxiPICState *s = SUNXI_PIC(d);
+ uint8_t i;
+
+ s->base_addr = 0;
+ s->protect = 0;
+ s->nmi = 0;
+ s->vector = 0;
+ for (i = 0; i< SUNXI_PIC_REG_IDX; i++) {
+ s->irq_pending[i] = 0;
+ s->fiq_pending[i] = 0;
+ s->select[i] = 0;
+ s->enable[i] = 0;
+ s->mask[i] = 0;
+ }
+}
+
+static void sunxi_pic_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = sunxi_pic_realize;
+ dc->reset = sunxi_pic_reset;
+ dc->desc = "sunxi pic";
+ dc->vmsd =&vmstate_sunxi_pic;
+ }
+
+static const TypeInfo sunxi_pic_info = {
+ .name = TYPE_SUNXI_PIC,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(SunxiPICState),
+ .class_init = sunxi_pic_class_init,
+};
+
+static void sunxi_register_types(void)
+{
+ type_register_static(&sunxi_pic_info);
+}
+
+type_init(sunxi_register_types);
diff --git a/include/hw/intc/sunxi-pic.h b/include/hw/intc/sunxi-pic.h
new file mode 100644
index 0000000..d52b53c
--- /dev/null
+++ b/include/hw/intc/sunxi-pic.h
@@ -0,0 +1,20 @@
+#ifndef SUNXI_PIC_H
+#define SUNXI_PIC_H
+
+#define TYPE_SUNXI_PIC "sunxi-pic"
+#define SUNXI_PIC(obj) OBJECT_CHECK(SunxiPICState, (obj), TYPE_SUNXI_PIC)
+
+#define SUNXI_PIC_VECTOR 0
+#define SUNXI_PIC_BASE_ADDR 4
+#define SUNXI_PIC_PROTECT 8
+#define SUNXI_PIC_NMI 0xc
+#define SUNXI_PIC_IRQ_PENDING 0x10
+#define SUNXI_PIC_FIQ_PENDING 0x20
+#define SUNXI_PIC_SELECT 0x30
+#define SUNXI_PIC_ENABLE 0x40
+#define SUNXI_PIC_MASK 0x50
+
+#define SUNXI_PIC_INT_NR 95