Re: [Qemu-devel] [PATCH 26/60] AArch64: Add ADR instruction emulation

[Peter Maydell]

On 19 November 2013 17:52, Claudio Fontana <address@hidden> wrote:
> static void disas_pc_rel_adr(DisasContext *s, uint32_t insn)
> {
>     /*
>      * 31 30 29 28 27 26 25 24 23     5 4  0
>      * op immlo  1  0  0  0  0   immhi   Rd
>      */
>     unsigned int page, imm, rd, len; /* op -> page, immhi:immlo -> imm */
>     uint64_t base;
>     sint64_t offset; /* SignExtend(imm) -> offset */
>
>     page = insn & (1 << 31) ? 1 : 0;
>     imm = extract32(insn, 29, 2) + extract32(insn, 5, 19) << 2;
>     rd = extract32(insn, 0, 5);

Claiming you want sign extension and not using sextract32()
is a bit odd.

>
>     base = s->pc - 4;
>     len = 19 + 2; /* immhi:immlo */
>     offset = imm;
>
>     if (page) {
>         /* ADRP (page based) */
>         base &= ~0xfff;
>         len += 12; /* immhi:immlo:Zeros(12) */
>         offset <<= 12; /* apply Zeros */
>     }
>
>     offset = (offset << (64 - len)) >> (64 - len); /* sign extend */

Don't manually sign extend, please.

>     tcg_gen_movi_i64(cpu_reg(reg), base + offset);
> }

thanks
-- PMM