[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exce
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exception |
Date: |
Fri, 1 Nov 2013 18:58:47 +0000 |
On 29 October 2013 22:41, Sebastian Macke <address@hidden> wrote:
> On 29/10/2013 12:47 PM, Peter Maydell wrote:
>>
>> On 29 October 2013 19:04, Sebastian Macke <address@hidden> wrote:
>>> /* Internal flags, delay slot flag */
>>> -#define D_FLAG 1
>>> +#define D_FLAG 2
>>
>> Since this set of #defines effectively is the documentation for
>> what the tb_flags usage is, can you update it to include the
>> new flag you've added, please?
>
>
> I will. I think I have done it in one of the later patches.
> But the D_FLAG was there before. What I did was just changing it to 2
> because 1 is used by the new SR_SM
> (supervisor mode) Flag.
Yes, that's what I mean -- this patch is adding a new flag
(because it's changing cpu_get_tb_cpu_state) and so it should
also be updating this set of #defines.
>> It looks suspicious that this patch doesn't include any change to
>> translate.c which reads the tb flag you've just added. Either:
>> (a) the translated code doesn't actually build in any dependencies
>> on the SR_SM flag, in which case it doesn't need to be a tb_flag at all
>> (b) the translated code is still referring directly to env->sr
>> somewhere,
>> in which case it needs to be changed to use the tb_flags version
>> instead
>>
>> Also, are you sure that tlb_flush() is needed purely for the change to the
>> SR_SM flags and not for any of the other CPU state changes that
>> openrisc_cpu_do_interrupt() is making when it does the user->supervisor
>> state change?
> The exception is going into supervisor mode and disables the mmu. The
> mmu_index is changed and it should work.
> But then the emulated Linux crashes.
> This does not happen when I add the supervisor mode flag to the tb_flags.
> What is included in the tb hash? The virtual pc + physical page + the
> tb_flags? Not the mmu_index?
You're right that the mmu_index is not included in the tb hash.
Does that mean that the CPU state which determines the
mmu_index needs to be in the tb_flags? I'm not sure and it's
not something I'd thought about before. Richard -- do you know?
thanks
-- PMM
- Re: [Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exception,
Peter Maydell <=