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Re: [Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov condition


From: Sebastian Macke
Subject: Re: [Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check
Date: Tue, 29 Oct 2013 14:23:46 -0700
User-agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.0.1

On 29/10/2013 2:15 PM, Max Filippov wrote:
On Tue, Oct 29, 2013 at 11:04 PM, Sebastian Macke <address@hidden> wrote:
srf is a boolean variable.
Therefore the instruction should check for != 0 and not for != SR_F

Signed-off-by: Sebastian Macke <address@hidden>
---
  target-openrisc/translate.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 378ff1b..9fd1126 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -565,7 +565,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn)
                  int lab = gen_new_label();
                  TCGv res = tcg_temp_local_new();
                  tcg_gen_mov_tl(res, cpu_R[rb]);
-                tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, SR_F, lab);
+                tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, 0, lab);
                  tcg_gen_mov_tl(res, cpu_R[ra]);
                  gen_set_label(lab);
                  tcg_gen_mov_tl(cpu_R[rd], res);
Looks like this implementation may be rewritten as

TCGv zero = tcg_const_tl(0);
tcg_gen_movcond_tl(cpu_R[rd], cpu_srf, zero, cpu_R[ra], cpu_R[rb], TCG_COND_EQ);
tcg_temp_free(zero);

You are right. I will change that.



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