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Re: [Qemu-devel] [PATCH 09/60] AArch64: Add b and bl handling
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 09/60] AArch64: Add b and bl handling |
Date: |
Fri, 27 Sep 2013 07:40:49 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130805 Thunderbird/17.0.8 |
On 09/26/2013 05:48 PM, Alexander Graf wrote:
> +static int get_bits(uint32_t inst, int start, int len)
> +{
> + return (inst >> start) & ((1 << len) - 1);
> +}
> +
> +static int get_sbits(uint32_t inst, int start, int len)
> +{
> + int r = get_bits(inst, start, len);
> + if (r & (1 << (len - 1))) {
> + /* Extend the MSB 1 to the higher bits */
> + r |= -1 & ~((1ULL << len) - 1);
> + }
> + return r;
> +}
extract32 and sextract32 please.
> +static TCGv_i64 cpu_reg(int reg)
> +{
> + if (reg == 31) {
> + /* XXX leaks temps */
> + return tcg_const_i64(0);
> + } else {
> + return cpu_X[reg];
> + }
> +}
See how we treat temporaries in the sparc translator.
We record them in the DisasContext to be freed at the
end of the insn.
> + tb = s->tb;
> + if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
Not the only conditions you need to check. In
particular, no single-stepping or tb->flags & CF_LAST_IO.
C.f. target-alpha's use_goto_tb function.
r~
- Re: [Qemu-devel] [PATCH 14/60] AArch64: Add orr instruction emulation, (continued)
- [Qemu-devel] [PATCH 02/60] arm: Give the fpscr rounding modes names, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 01/60] arm: Use symbolic device names for vfp cmp, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 13/60] AArch64: Add stubs for a64 specific helpers, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 10/60] AArch64: Add handling for br instructions, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 05/60] softfloat: Add stubs for int16 conversion, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 12/60] AArch64: Add ldarx style instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 09/60] AArch64: Add b and bl handling, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 08/60] AArch64: Add support to print VFP registers in CPU, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 22/60] AArch64: Add AdvSIMD scalar three same group handling, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 11/60] AArch64: Add STP instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 04/60] arm: Add AArch64 disassembler stub, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 19/60] AArch64: Add ins GPR->Vec instruction emulation, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 07/60] ARM: Add 64bit VFP handling, Alexander Graf, 2013/09/26
- [Qemu-devel] [PATCH 06/60] AArch64: Add set_pc cpu method, Alexander Graf, 2013/09/26