[Qemu-devel] [PATCH 24/60] AArch64: Add SIMD ushll instruction emulation

[Alexander Graf]

This patch adds emulation support for the ushll instruction.

Signed-off-by: Alexander Graf <address@hidden>
---
 target-arm/translate-a64.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 50561cf..6a3b34e 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1176,6 +1176,55 @@ static void handle_simdmodi(DisasContext *s, uint32_t 
insn)
     tcg_temp_free_i64(tcg_imm);
 }
 
+/* SIMD shift ushll */
+static void handle_ushll(DisasContext *s, uint32_t insn)
+{
+    int rd = get_bits(insn, 0, 5);
+    int rn = get_bits(insn, 5, 5);
+    int immh = get_bits(insn, 19, 4);
+    bool is_q = get_bits(insn, 30, 1);
+    int freg_offs_d = offsetof(CPUARMState, vfp.regs[rd * 2]);
+    int freg_offs_n = offsetof(CPUARMState, vfp.regs[rn * 2]);
+    TCGv_i64 tcg_tmp = tcg_temp_new_i64();
+    int i;
+    int ebytes;
+    int size;
+    int shift = get_bits(insn, 16, 7);
+
+    if (is_q) {
+        freg_offs_n += sizeof(float64);
+    }
+
+    for (size = 0; !(immh & (1 << size)); size++) {
+        if (size > 3) {
+            unallocated_encoding(s);
+            return;
+        }
+    }
+
+    ebytes = 1 << size;
+    shift -= (8 << size);
+
+    if (!immh) {
+        /* XXX see asimdimm */
+        unallocated_encoding(s);
+        return;
+    }
+
+    if (immh & 0x8) {
+        unallocated_encoding(s);
+        return;
+    }
+
+    for (i = 0; i < (8 / ebytes); i++) {
+        simd_ld(tcg_tmp, freg_offs_n + (i * ebytes), size);
+        tcg_gen_shli_i64(tcg_tmp, tcg_tmp, shift);
+        simd_st(tcg_tmp, freg_offs_d + (i * ebytes * 2), size + 1);
+    }
+
+    tcg_temp_free_i64(tcg_tmp);
+}
+
 void disas_a64_insn(CPUARMState *env, DisasContext *s)
 {
     uint32_t insn;
@@ -1259,6 +1308,9 @@ void disas_a64_insn(CPUARMState *env, DisasContext *s)
         if (!get_bits(insn, 31, 1) && !get_bits(insn, 19, 5) &&
             (get_bits(insn, 10, 2) == 1)) {
             handle_simdmodi(s, insn);
+        } else if (!get_bits(insn, 31, 1) && !get_bits(insn, 23, 1) &&
+                   (get_bits(insn, 10, 6) == 0x29)) {
+            handle_ushll(s, insn);
         } else {
             unallocated_encoding(s);
         }
-- 
1.7.12.4