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[Qemu-devel] [PULL 10/28] target-arm: Export cpu_env
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 10/28] target-arm: Export cpu_env |
Date: |
Tue, 10 Sep 2013 19:52:04 +0100 |
From: Alexander Graf <address@hidden>
The cpu_env tcg variable will be used by both the AArch32 and AArch64
handling code. Unstaticify it, so that both sides can make use of it.
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: John Rigby <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/translate.c | 2 +-
target-arm/translate.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 450a0b6..2605833 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -61,7 +61,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#define DISAS_WFI 4
#define DISAS_SWI 5
-static TCGv_ptr cpu_env;
+TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
diff --git a/target-arm/translate.h b/target-arm/translate.h
index e727bc6..8ba1433 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -24,4 +24,6 @@ typedef struct DisasContext {
int vec_stride;
} DisasContext;
+extern TCGv_ptr cpu_env;
+
#endif /* TARGET_ARM_TRANSLATE_H */
--
1.7.9.5
- [Qemu-devel] [PULL 00/28] target-arm queue, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 06/28] pl110: Clarify comment about PL110 ID on VersatilePB, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 28/28] configure: Add handling code for AArch64 targets, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 26/28] linux-user: Allow targets to specify a minimum uname release, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 23/28] linux-user: Make sure NWFPE code is 32 bit ARM only, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 25/28] linux-user: Add AArch64 termbits.h definitions, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 21/28] linux-user: Fix up AArch64 syscall handlers, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 19/28] linux-user: Add cpu loop for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 18/28] linux-user: Don't treat AArch64 cpu names specially, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 24/28] linux-user: Implement cpu_set_tls() and cpu_clone_regs() for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 10/28] target-arm: Export cpu_env,
Peter Maydell <=
- [Qemu-devel] [PULL 20/28] linux-user: Add syscall number definitions for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 07/28] abitypes.h: Remove incorrect ARM ABI_LLONG_ALIGNMENT, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 14/28] target-arm: Disable 32 bit CPUs in 64 bit linux-user builds, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 27/28] linux-user: Add AArch64 support, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 22/28] linux-user: Add signal handling for AArch64, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 16/28] target-arm: Add AArch64 translation stub, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 03/28] target-arm: Avoid "1 << 31" undefined behaviour, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 01/28] target-arm: Make '-cpu any' available in linux-user mode only, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 13/28] target-arm: Add new AArch64CPUInfo base class and subclasses, Peter Maydell, 2013/09/10
- [Qemu-devel] [PULL 09/28] target-arm: Extract the disas struct to a header file, Peter Maydell, 2013/09/10