[Qemu-devel] [PATCH 06/19] tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu

[Richard Henderson]

When performing an operation with two input registers, we'd leave
the stop bit (and thus an extra cycle) that's only needed when one
or the other input is a constant.

Signed-off-by: Richard Henderson <address@hidden>
---
 tcg/ia64/tcg-target.c | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index ad5a6b9..f0c5e0b 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -1042,31 +1042,26 @@ static inline void tcg_out_st(TCGContext *s, TCGType 
type, TCGReg arg,
     }
 }
 
-static inline void tcg_out_alu(TCGContext *s, uint64_t opc_a1, TCGArg ret,
-                               TCGArg arg1, int const_arg1,
-                               TCGArg arg2, int const_arg2)
+static void tcg_out_alu(TCGContext *s, uint64_t opc_a1, TCGReg ret, TCGArg 
arg1,
+                        int const_arg1, TCGArg arg2, int const_arg2)
 {
-    uint64_t opc1, opc2;
+    uint64_t opc1 = 0, opc2 = 0;
 
     if (const_arg1 && arg1 != 0) {
         opc1 = tcg_opc_a5(TCG_REG_P0, OPC_ADDL_A5,
                           TCG_REG_R2, arg1, TCG_REG_R0);
         arg1 = TCG_REG_R2;
-    } else {
-        opc1 = INSN_NOP_M;
     }
 
     if (const_arg2 && arg2 != 0) {
         opc2 = tcg_opc_a5(TCG_REG_P0, OPC_ADDL_A5,
                           TCG_REG_R3, arg2, TCG_REG_R0);
         arg2 = TCG_REG_R3;
-    } else {
-        opc2 = INSN_NOP_I;
     }
 
-    tcg_out_bundle(s, mII,
-                   opc1,
-                   opc2,
+    tcg_out_bundle(s, (opc1 || opc2 ? mII : miI),
+                   opc1 ? opc1 : INSN_NOP_M,
+                   opc2 ? opc2 : INSN_NOP_I,
                    tcg_opc_a1(TCG_REG_P0, opc_a1, ret, arg1, arg2));
 }
 
-- 
1.8.3.1